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参数资料
| 型号： | ZL50114GAG2 |
| 厂商： | XILINX INC |
| 元件分类： | 通信及网络 |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PBGA552 |
| 封装： | 35 X 35 MM, 1.27 MM PITCH, LEAD FREE, PLASTIC, MS-034, BGA-552 |
| 文件页数： | 62/113页 |
| 文件大小： | 2004K |
| 代理商： | ZL50114GAG2 |
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ZL50110/11/12/14
Data Sheet
52
Zarlink Semiconductor Inc.
The ZL50110/11/12/14 is capable of handling circuit emulation of both structured T1, E1, and J2 links (e.g., for
support of fractional circuits) and unstructured (or clear channel) T1, E1, J2, T3 and E3 links. The device handles
the data-plane requirements of the provider edge inter-working function (with the exception of the physical
interfaces and line interface units). Control plane functions are forwarded to the host processor controlling the
ZL50110/11/12/14 device.
The ZL50110/11/12/14 provides a per-stream clock recovery function, in unstructured mode, to reproduce the TDM
service frequency at the egress of the packet network. This is required otherwise the queue at the egress of the
packet network will either fill up or empty, depending on whether the regenerated clock is slower or faster than the
original.
Figure 6 - Leased Line Services Over a Circuit Emulation Link
4.2
Metropolitan Area Network Aggregation
The metro Ethernet application, shown in Figure 7, consists of the metro Ethernet service modules sitting on the
edge of the Metro Ethernet ring. The modules will connect Ethernet circuits and TDM circuits to the metro ring.
The ZL50110/11/12/14 is used to emulate leased line TDM circuits over Ethernet by establishing CESoP
connections over the Metro Ethernet ring between the MTUs/MDUs and the PSTN. The use of CESoP eliminates
the need for a separate TDM network in the metro core, thereby enabling convergence on a unified Ethernet
network.
Figure 7 - Metropolitan Area Network Aggregation using CESoP
Carrier Network
Customer
Premises
Customer
Premises
Extract
Clock
C
u
s
to
m
er
da
ta
~
fservice
TDM
Packet
Network
TDM
C
u
s
tomer
da
ta
TDM to
packet
fservice
Provider Edge
Interworking
Function
Provider Edge
Interworking
Function
queue
Metro
Core
Metropolitan
Access Network
(Resilient Packet Ring or
Metro Ethernet)
Multi-Tenant
Units
T1/E1
Links
Campus
CESoP
OC-3, DS3
CESoP
Metro
Access
Metro
Access
T1/E1
Links
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ZL50115 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50115GAG | 制造商:Microsemi Corporation 功能描述:SWIT FABRIC 1K X 1K 1.8V/3.3V 324BGA - Trays 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA |
| ZL50115GAG2 | 制造商:Microsemi Corporation 功能描述:PB FREE 1 TDM + 1 ETHERNET - Trays 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 32CH 324PBGA |
| ZL50116 | 制造商:ZARLINK 制造商全称:Zarlink Semiconductor Inc 功能描述:32, 64 and 128 Channel CESoP Processors |
| ZL50116GAG | 制造商:Microsemi Corporation 功能描述:2 TDM + 1 ETHERNET - Trays 制造商:MICROSEMI CONSUMER MEDICAL PRODUCT GROUP 功能描述:IC CESOP PROCESSOR 64CH 324PBGA 制造商:Microsemi Corporation 功能描述:IC CESOP PROCESSOR 64CH 324PBGA |
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