参数资料
型号: ADE7878ACPZ
厂商: Analog Devices Inc
文件页数: 63/100页
文件大小: 0K
描述: IC ENERGY METERING 3PH 40LFCSP
标准包装: 1
输入阻抗: 400 千欧
测量误差: 0.2%
电压 - 高输入/输出: 2.4V
电压 - 低输入/输出: 0.4V
电源电压: 2.4 V ~ 3.7 V
测量仪表类型: 3 相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘,CSP
供应商设备封装: 40-LFCSP-WQ(6x6)
包装: 托盘
Data Sheet
CF Outputs for Various Accumulation Modes
Bits[1:0] (WATTACC[1:0]) in the ACCMODE register deter-
mine the accumulation modes of the total active and fundamental
powers when signals proportional to the active powers are chosen
at the CFx pins (the CFxSEL[2:0] bits in the CFMODE register
equal 000 or 011). When WATTACC[1:0] = 00 (the default value),
the active powers are sign accumulated before entering the energy-
to-frequency converter. Figure 78 shows how signed active power
accumulation works. In this mode, the CFx pulses synchronize
perfectly with the active energy accumulated in xWATTHR regis-
ters because the powers are sign accumulated in both data paths.
ACTIVE ENERGY
ADE7854/ADE7858/ADE7868/ADE7878
ACTIVE ENERGY
NO-LOAD
THRESHOLD
ACTIVE POWER
NO-LOAD
THRESHOLD
REVAPx BIT
IN STATUS0
xWSIGN BIT
IN PHSIGN
NO-LOAD
THRESHOLD
APNOLOAD
SIGN = POSITIVE
POS
NEG POS
NEG
ACTIVE POWER
NO-LOAD
THRESHOLD
REVAPx BIT
IN STATUS0
xWSIGN BIT
IN PHSIGN
Figure 79. Active Power Absolute Accumulation Mode
REACTIVE
ENERGY
APNOLOAD
POS
NEG POS
NEG
NO-LOAD
THRESHOLD
SIGN = POSITIVE
Figure 78. Active Power Signed Accumulation Mode
When WATTACC[1:0] = 11, the active powers are accumulated
in absolute mode. When the powers are negative, they change
sign and accumulate together with the positive power. Figure 79
shows how absolute active power accumulation works. Note
that in this mode, the xWATTHR registers continue to accumulate
REACTIVE
POWER
NO-LOAD
THRESHOLD
REVRPx BIT
IN STATUS0
xVARSIGN BIT
IN PHSIGN
active powers in signed mode, even if the CFx pulses are gener-
ated based on the absolute accumulation mode.
VARNOLOAD
SIGN = POSITIVE
POS
NEG POS
NEG
WATTACC[1:0] settings of 01 and 10 are reserved. The
ADE7854 / ADE7858 / ADE7868 / ADE7878 behave identically to
the case when WATTACC[1:0] = 00.
Bits[3:2] (VARACC[1:0]) in the ACCMODE register determine the
accumulation modes of the total and fundamental reactive powers
when signals proportional to the reactive powers are chosen at the
CFx pins (the CFxSEL[2:0] bits in the CFMODE register equal
001 or 100). When VARACC[1:0] = 00, the default value, the
reactive powers are sign accumulated before entering the
energy-to-frequency converter. Figure 80 shows how signed
reactive power accumulation works. In this mode, the CFx
pulses synchronize perfectly with the reactive energy accumu-
lated in the xVARHR registers because the powers are sign
accumulated in both datapaths.
Figure 80. Reactive Power Signed Accumulation Mode
When VARACC[1:0] = 10, the reactive powers are accumulated
depending on the sign of the corresponding active power. If the
active power is positive, the reactive power is accumulated as is.
If the active power is negative, the sign of the reactive power is
changed for accumulation. Figure 81 shows how the sign adjusted
reactive power accumulation mode works. In this mode, the
xVARHR registers continue to accumulate reactive powers in
signed mode, even if the CFx pulses are generated based on the
sign adjusted accumulation mode.
VARACC[1:0] settings of 01 and 11 are reserved. The
ADE7854 / ADE7858 / ADE7868 / ADE7878 behave identically to
the case when VARACC[1:0] = 00.
Rev. H | Page 63 of 100
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