参数资料
型号: ADE7878ACPZ
厂商: Analog Devices Inc
文件页数: 87/100页
文件大小: 0K
描述: IC ENERGY METERING 3PH 40LFCSP
标准包装: 1
输入阻抗: 400 千欧
测量误差: 0.2%
电压 - 高输入/输出: 2.4V
电压 - 低输入/输出: 0.4V
电源电压: 2.4 V ~ 3.7 V
测量仪表类型: 3 相
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 40-WFQFN 裸露焊盘,CSP
供应商设备封装: 40-LFCSP-WQ(6x6)
包装: 托盘
Data Sheet
Table 38. STATUS1 Register (Address 0xE503)
ADE7854/ADE7858/ADE7868/ADE7878
Bit
Location
0
Bit Mnemonic
NLOAD
Default Value
0
Description
When this bit is set to 1, it indicates that at least one phase entered no load condition based
on total active and reactive powers. The phase is indicated in Bits[2:0] (NLPHASE[x]) in the
PHNOLOAD register (see Table 42).
1
FNLOAD
0
When this bit is set to 1, it indicates that at least one phase entered no load condition based
on fundamental active and reactive powers. The phase is indicated in Bits[5:3] (FNLPHASE[x])
in PHNOLOAD register (see Table 42 in which this register is described). This bit is always 0
for ADE7854 , ADE7858 , and ADE7868 .
2
VANLOAD
0
When this bit is set to 1, it indicates that at least one phase entered no load condition based
on apparent power. The phase is indicated in Bits[8:6] (VANLPHASE[x]) in the PHNOLOAD
register (see Table 42).
3
4
5
6
7
8
9
10
11
12
13
14
15
ZXTOVA
ZXTOVB
ZXTOVC
ZXTOIA
ZXTOIB
ZXTOIC
ZXVA
ZXVB
ZXVC
ZXIA
ZXIB
ZXIC
RSTDONE
0
0
0
0
0
0
0
0
0
0
0
0
1
When this bit is set to 1, it indicates a zero crossing on Phase A voltage is missing.
When this bit is set to 1, it indicates a zero crossing on Phase B voltage is missing.
When this bit is set to 1, it indicates a zero crossing on Phase C voltage is missing.
When this bit is set to 1, it indicates a zero crossing on Phase A current is missing.
When this bit is set to 1, it indicates a zero crossing on Phase B current is missing.
When this bit is set to 1, it indicates a zero crossing on Phase C current is missing.
When this bit is set to 1, it indicates a zero crossing has been detected on Phase A voltage.
When this bit is set to 1, it indicates a zero crossing has been detected on Phase B voltage.
When this bit is set to 1, it indicates a zero crossing has been detected on Phase C voltage.
When this bit is set to 1, it indicates a zero crossing has been detected on Phase A current.
When this bit is set to 1, it indicates a zero crossing has been detected on Phase B current.
When this bit is set to 1, it indicates a zero crossing has been detected on Phase C current.
In case of a software reset command, Bit 7 (SWRST) is set to 1 in the CONFIG register, or a
transition from PSM1, PSM2, or PSM3 to PSM0, or a hardware reset, this bit is set t o 1 a t the
end of the transition process and after all registers changed value to default. The IRQ1 pin
goes low to signal this moment because this interrupt cannot be disabled.
16
17
18
19
20
SAG
OI
OV
SEQERR
MISMTCH
0
0
0
0
0
When this bit is set to 1, it indicates a SAG event has occurred on one of the phases indicated
by Bits[14:12] (VSPHASE[x]) in the PHSTATUS register (see Table 41).
When this bit is set to 1, it indicates an overcurrent event has occurred on one of the phases
indicated by Bits[5:3] (OIPHASE[x]) in the PHSTATUS register (see Table 41).
When this bit is set to 1, it indicates an overvoltage event has occurred on one of the phases
indicated by Bits[11:9] (OVPHASE[x]) in the PHSTATUS register (see Table 41).
When this bit is set to 1, it indicates a negative-to-positive zero crossing on Phase A voltage
was not followed by a negative-to-positive zero crossing on Phase B voltage but by a
negative-to-positive zero crossing on Phase C voltage.
When this bit is set to 1, it indicates ISUM ? INWV > ISUMLVL , where ISUMLVL is
indicated in the ISUMLVL register. This bit is always 0 for ADE7854 and ADE7858 .
21
22
23
Reserved
Reserved
PKI
1
0
0
Reserved. This bit is always set to 1.
Reserved. This bit is always set to 0.
When this bit is set to 1, it indicates that the period used to detect the peak value in the
current channel has ended. The IPEAK register contains the peak value and the phase where
the peak has been detected (see Table 35).
24
PKV
0
When this bit is set to 1, it indicates that the period used to detect the peak value in the
voltage channel has ended. VPEAK register contains the peak value and the phase where the
peak has been detected (see Table 36).
31:25
Reserved
000 0000
Reserved. These bits are always 0.
Rev. H| Page 87 of 100
相关PDF资料
PDF描述
GBC06DREI-S13 CONN EDGECARD 12POS .100 EXTEND
VI-J60-CX-F4 CONVERTER MOD DC/DC 5V 75W
ECA10DCBT CONN EDGECARD 20POS R/A .125 SLD
EL7242CSZ-T13 IC DRIVER MOSFET DUAL HS 8-SOIC
ADE7169ASTZF16 IC ENERGY METER 1PHASE 64LQFP
相关代理商/技术参数
参数描述
ADE7878ACPZ 制造商:Analog Devices 功能描述:IC MULTIFUNCTION ENERGY METERING LFCSP40
ADE7878ACPZ-RL 功能描述:IC ENERGY METERING 3PH 40LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:*
ADE7878XCPZ 制造商:Analog Devices 功能描述:POLY PHASE MULTIFUNCTION ENERGY METERING IC WITH TOTAL - Bulk
ADE7880 制造商:Analog Devices 功能描述:BOARD EVAL ENERGY METER ADE
ADE7880ACPZ 功能描述:IC ENERGY METERING 3PH 40LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 能量测量 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:2,500 系列:*