参数资料
| 型号： | IP-FFT |
| 厂商： | Altera |
| 文件页数： | 43/70页 |
| 文件大小： | 0K |
| 描述： | IP FFT/IFFT |
| 标准包装： | 1 |
| 系列： | * |
| 类型： | MegaCore |
| 功能： | 快速傅里叶变换处理器 |
| 许可证： | 初始许可证 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页当前第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页
3. Functional Description
The discrete Fourier transform (DFT), of length N , calculates the sampled Fourier
transform of a discrete-time sequence at N evenly distributed points ? k = 2 ? k / N on
the unit circle.
The following equation shows the length- N forward DFT of a sequence x( n ):
N – 1
X ? k ? =
?
x ? n ? e
? – j 2 ? nk ? ? N
n = 0
where k = 0, 1, ... N – 1
The following equation shows the length-N inverse DFT:
N – 1
x ? n ? = ? 1 ? N ?
?
X ? k ? e
? j 2 ? nk ? ? N
k = 0
where n = 0, 1, ... N – 1
The complexity of the DFT direct computation can be significantly reduced by using
fast algorithms that use a nested decomposition of the summation in equations one
and two—in addition to exploiting various symmetries inherent in the complex
multiplications. One such algorithm is the Cooley-Tukey radix-r decimation-in-
frequency (DIF) FFT, which recursively divides the input sequence into N/r sequences
of length r and requires log r N stages of computation.
Each stage of the decomposition typically shares the same hardware, with the data
being read from memory, passed through the FFT processor and written back to
memory. Each pass through the FFT processor is required to be performed log r N
times. Popular choices of the radix are r = 2, 4, and 16. Increasing the radix of the
decomposition leads to a reduction in the number of passes required through the FFT
processor at the expense of device resources.
1
The MegaCore function does not apply the scaling factor 1/ N required for a length- N
inverse DFT. You must apply this factor externally.
Buffered, Burst, and Streaming Architectures
A radix-4 decomposition, which divides the input sequence recursively to form
four-point sequences, has the advantage that it requires only trivial multiplications in
the four-point DFT and is the chosen radix in the Altera FFT MegaCore function. This
results in the highest throughput decomposition, while requiring non-trivial complex
multiplications in the post-butterfly twiddle-factor rotations only. In cases where N is
an odd power of two, the FFT MegaCore automatically implements a radix-2 pass on
the last pass to complete the transform.
November 2013
Altera Corporation
FFT MegaCore Function
User Guide
相关PDF资料 |
PDF描述 |
|---|---|
| IP-FIR | IP FIR COMPILER |
| IP-NCO | IP NCO COMPILER |
| IP-NIOS | IP NIOS II MEGACORE |
| IP-PCI/MT64 | IP PCI 64BIT MASTER/TARGET |
| IP-PCIE/8 | IP PCI EXPRESS, X8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| IPFH6N03LA G | 功能描述:MOSFET N-CH 25V 50A DPAK RoHS:是 类别:分离式半导体产品 >> FET - 单 系列:OptiMOS™ 标准包装:1,000 系列:MESH OVERLAY™ FET 型:MOSFET N 通道，金属氧化物 FET 特点:逻辑电平门 漏极至源极电压(Vdss):200V 电流 - 连续漏极(Id) @ 25° C:18A 开态Rds（最大）@ Id, Vgs @ 25° C:180 毫欧 @ 9A，10V Id 时的 Vgs(th)（最大）:4V @ 250µA 闸电荷(Qg) @ Vgs:72nC @ 10V 输入电容 (Ciss) @ Vds:1560pF @ 25V 功率 - 最大:40W 安装类型:通孔 封装/外壳:TO-220-3 整包 供应商设备封装:TO-220FP 包装:管件 |
| IPFH6N03LAG | 功能描述:MOSFET N-Channel MOSFET 20-200V RoHS:否 制造商:STMicroelectronics 晶体管极性:N-Channel 汲极/源极击穿电压:650 V 闸/源击穿电压:25 V 漏极连续电流:130 A 电阻汲极/源极 RDS（导通）:0.014 Ohms 配置:Single 最大工作温度: 安装风格:Through Hole 封装 / 箱体:Max247 封装:Tube |
| IP-FIR | 功能描述:开发软件 FIR Compiler MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IP-FIRII | 功能描述:开发软件 FIR Compiler II MegaCore RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| IPFLBPT2 | 制造商:Carlo Gavazzi 功能描述:IL 35MM MUSH P-P PL 22MM RED |
发布紧急采购，3分钟左右您将得到回复。