
24. Programmable I/O Ports
24.4
Function Select Register B (PSLk Register, k = 0 to 3, 5, 9 to 11)
When multiple peripheral function outputs are assigned to the same pin, the PSLk register select which peripheral
function output to use.
the PSL3 register.
24.5
Function Select Register C (PSC, PSC2, PSC3, and PSC9 Registers)
Figures
24.16 and
24.17 show registers PSC, PSC2, PSC3, and PSC9.
When multiple peripheral function outputs are assigned to the same pin, registers PSC, PSC2, PSC3, and PSC9
select which peripheral function output to use.
register.
24.6
Function Select Register D (PSD1 and PSD2 Registers)
When multiple peripheral function outputs are assigned to the same pin, registers PSD1 and PSD2 select which
peripheral function output to use.
24.7
Function Select Register E (PSE1 Registers)
When multiple peripheral function outputs are assigned to the same pin, the PSE1 register selects which peripheral
function output to use.
24.8
Pull-up Control Register 0 to 4 (PUR0 to PUR4 Registers)
Figures
24.20 to
24.23 show registers PUR0 to PUR4.
Registers PUR0 to PUR4 select whether the ports, divided into groups of four, are pulled up or not. Set the bit in
registers PUR0 to PUR4 to 1 (pull-up) and the bit in the PDi register to 0 (input mode) to pull-up the corresponding
ports.
24.9
Port Control Register (PCR Register)
The PCR register selects either CMOS output or N-channel open drain output as port P1 output format. When the
PCR0 bit is set to 1, P channel in the CMOS port is turned off at all times and in result N-channel open drain output
is selected. This is, however, pseudo open drain. Therefore, the absolute maximum rating of the input voltage is
from -0.3 V to VCC + 0.3 V.