
14.1.1
Timer Mode
In timer mode, the timer counts an internally generated count source.
Table 14.3 lists specifications of timer mode.
Figure 14.10 shows the TAiMR register (i=0 to 4) in timer mode,
Table 14.3
Specifications of Timer Mode
NOTES:
1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).
2. Wait for 1 count source cycle or more to write after the count starts.
Item
Specification
Count sources
Count operations
The timer decrements a counter value
When the timer underflows, the contents of the reload register are reloaded into
the counter and the count continues.
Counter cycle
n + 1
fj: count source frequency
fj
n: setting value of the TAi register (i = 0 to 4), 0000h to FFFFh
Count start condition
The TAiS bit in the TABSR register is set to 1 (count starts)
Count stop condition
The TAiS bit is set to 0 (count stops)
Interrupt request generation timing When the timer underflows
TAiIN pin function
Gate input
TAiOUT pin function
Pulse output
Read from timer
The TAi register indicates a counter value
Write to timer
When a value is written to the TAi register while the count is stopped, the value
is written to both the reload register and the counter.
When a value is written to the TAi register while counting, the value is written to
the reload register (It is transferred to the counter at the next reload timing)
.(2)Selectable function
Gate function
A signal applied to the TAiIN pin determines whether the timer starts or stops
counting.
Pulse output function
The polarity of the TAiOUT pin is inverted whenever the timer underflows. The
TAiOUT pin outputs an “L” signal while the TAiS bit is 0 (count stops).