
3. Memory
3.
Memory
The internal ROM is allocated lower addresses, beginning with address FFFFFFh. For example, a 512-Kbyte internal
ROM area is allocated in addresses F80000h to FFFFFFh.
The fixed interrupt vectors are allocated addresses FFFFDCh to FFFFFFh. They store the start address of each
interrupt routine. Refer to 10. Interrupts for details.
The internal RAM is allocated higher addresses, beginning with address 000800h. For example, a 32-Kbyte internal
RAM area is allocated addresses 000800h to 0087FFh. The internal RAM is used not only for storing data but for the
stacks when subroutines are called or when interrupt requests are acknowledged.
SFRs are allocated address 000000h to 0007FFh. The peripheral function control registers such as for I/O ports, A/D
converters, serial interfaces, timers are allocated here. All blank spaces within SFRs are reserved and cannot be
accessed by users.
The special page vectors are allocated addresses FFFE00h to FFFFDBh. They are used for the JMPS instruction and
JSRS instruction. Refer to the Renesas publication M32C/90 Series Software Manual for details.
Figure 3.1
Memory Map
NOTE:
1. Watchdog timer interrupt and oscillation stop detect interrupt use the same vector.
000000h
000800h
XXXXXXh
00F000h
YYYYYYh
FFFFFFh
FFFFDCh
FFFE00h
010000h
Capacity
XXXXXXh
Internal RAM
Reset
Watchdog timer(1)
Address match
BRK instruction
Overflow
Undefined instruction
Special page
vector table
SFR
Internal RAM
Reserved
Internal ROM
Block A
NMI
Capacity
YYYYYYh
Internal ROM
0087FFh
32 Kbytes
00A7FFh
40 Kbytes
512 Kbytes
768 Kbytes
F80000h
F40000h