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参数资料
| 型号： | NAND08GW3B2CZL1F |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 1G X 8 FLASH 3V PROM, 25000 ns, PBGA52 |
| 封装： | 12 X 17 MM, 1 MM PITCH, LEAD FREE, LGA-52 |
| 文件页数： | 19/72页 |
| 文件大小： | 1919K |
| 代理商： | NAND08GW3B2CZL1F |
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Device operations
NAND04G-B2D, NAND08G-BxC
6.3
Page program
The page program operation is the standard operation to program data to the memory array.
Generally, the page is programmed sequentially, however, the device does support random
input within a page.
It is recommended to address pages sequentially within a given block.
The memory array is programmed by page, however, partial page programming is allowed
where any number of bytes (1 to 2112) or words (1 to 1056) can be programmed.
The maximum number of consecutive, partial-page program operations allowed in the same
page is four. After exceeding four operations a Block Erase command must be issued before
any further program operations can take place in that page.
6.3.1
Sequential input
To input data sequentially the addresses must be sequential and remain in one block.
For sequential input each page program operation consists of the following five steps:
1.
One bus cycle is required to set up the Page Program (sequential input) command (see
2.
Five bus cycles are then required to input the program address (refer to Table 6:
3.
The data is then loaded into the data registers
4.
One bus cycle is required to issue the Page Program Confirm command to start the
P/E/R controller. The P/E/R controller only starts if the data has been loaded in step 3.
5.
the P/E/R controller then programs the data into the array.
See Figure 11: Page program operation for more information.
6.3.2
Random data input in page
During a sequential input operation, the next sequential address to be programmed can be
replaced by a random address by issuing a Random Data Input command. The following
two steps are required to issue the command:
1.
One bus cycle is required to set up the Random Data Input command (see Table 10:
2.
Two bus cycles are then required to input the new column address (refer to Table 6:
Random data input can be repeated as often as required in any given page.
Once the program operation has started, the status register can be read using the Read
Status Register command. During program operations the status register only flags errors
for bits set to '1' that have not been successfully programmed to '0'.
During the program operation, only the Read Status Register and Reset commands are
accepted; all other commands are ignored.
Once the program operation has completed, the P/E/R controller bit SR6 is set to ‘1’ and the
Ready/Busy signal goes High.
The device remains in read status register mode until another valid command is written to
the command interface.
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| NAND08GW3B4BN6E | 制造商:Micron Technology Inc 功能描述:NAND - Trays |
| NAND08GW3B4BN6F | 制造商:Micron Technology Inc 功能描述:NAND - Tape and Reel |
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| NAND08GW3C2AE01 | 功能描述:闪存 NAND & S.MEDIA FLASH RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
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