Lattice Semiconductor
85
Data Sheet
September, 2002
ORCA Series 4 FPGAs
TimingCharacteristics(continued)
Table45.MicroprocessorInterface(MPI)TimingCharacteristics
OR4Exxx industrial: VDD15 = 1.4 V to 1.6 V, VDD33 = 3.0 V to 3.6 V, VDDIO= 3.0 V to 3.6 V, –40 °C
< TJ< + 125 °C
Table46.EmbeddedSystemBus(ESB)TimingCharacteristics
OR4Exxx industrial: VDD15 = 1.4 V to 1.6 V, VDD33 = 3.0 V to 3.6 V, VDDIO= 3.0 V to 3.6 V, –40 °C
< TJ< + 125 °C
Table47.Phase-LockedLoop(PLL)TimingCharacteristics
See the section on PLLs in this data sheet and in the PLL application note for timing information.
Table48.Boundary-ScanTimingCharacteristics
OR4Exxx industrial: VDD15 = 1.4 V to 1.6 V, VDD33 = 3.0 V to 3.6 V, VDDIO= 3.0 V to 3.6 V, –40 °C
< TJ< +125 °C;
CL = 30 pF.
5-6764(F)
Figure47.Boundary-ScanTimingDiagram
Parameter
Symbol
Min
Max
Unit
MPIControl(STRB,WR,etc.)toMPI_CLKSetupTime
MPICTRL_SET
7.7
—
ns
MPIAddresstoMPI_CLKSetupTime
MPIADR_SET
3.5
—
ns
MPIWriteDatatoMPI_CLKSetupTime
MPIDAT_SET
3.4
—
ns
AllHoldTimes
MPI_HLD
0.0
—
ns
MPI_CLKtoMPIControl(TA,TEA,RETRY)
MPICTRL_DEL
—
8.3
ns
MPI_CLKtoMPIData(8-bit)
MPIDAT8_DEL
—
9.2
ns
MPI_CLKtoMPIData(16-bit)
MPIDAT16_DEL
—
10.0
ns
MPI_CLKtoMPIData(32-bit)
MPIDAT32_DEL
—
10.6
ns
MPI_CLKFrequency
MPI_CLK_FRQ
—
66
MHz
Parameter
Symbol
Min
Max
Unit
ESB_CLKFrequency(nowaitstates)
ESB_CLKFrequency(withwaitstates)
ESB_CLK_FRQ
—
66
100
MHz
Parameter
Symbol
Min
Max
Unit
TDI/TMStoTCKSetupTime
TS
10.0
—
ns
TDI/TMSHoldTimefromTCK
TH
0.0
—
ns
TCKLowTime
TCL
25.0
—
ns
TCKHighTime
TCH
25.0
—
ns
TCKtoTDODelay
TD
—
10.0
ns
TCKFrequency
TTCK
—
20.0
MHz
TCK
TMS
TDI
TDO
TS
TH
TD