参数资料
型号: RJ80530LZ001512
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 1000 MHz, MICROPROCESSOR, CPGA478
封装: MICRO, FCPGA-478
文件页数: 23/96页
文件大小: 2018K
代理商: RJ80530LZ001512
Introduction
R
Mobile Intel
Pentium III Processor-M Datasheet
3
Contents
1.
Introduction .................................................................................................................................... 11
1.1
Overview .............................................................................................................. 12
1.2
State of the Data .................................................................................................. 12
1.3
Terminology ......................................................................................................... 13
1.4
References........................................................................................................... 13
2.
Mobile Intel Pentium III Processor-M Features.............................................................................. 14
2.1
New Features in the Mobile Pentium III Processor-M ......................................... 14
2.1.1
133-MHz PSB With AGTL Signaling....................................................... 14
2.1.2
512-K On-die Integrated L2 Cache......................................................... 14
2.1.3
Data Prefetch Logic ................................................................................ 14
2.1.4
Differential Clocking ................................................................................ 14
2.1.5
Deeper Sleep State................................................................................. 15
2.1.6
Signal Differences Between the Mobile Pentium III Processor (in
BGA2 and Micro-PGA2 Packages) and the Mobile Intel Pentium III
Processor-M............................................................................................ 15
2.2
Power Management............................................................................................. 15
2.2.1
Clock Control Architecture ...................................................................... 15
2.2.2
Normal State ........................................................................................... 15
2.2.3
Auto Halt State........................................................................................ 16
2.2.4
Quick Start State..................................................................................... 17
2.2.5
HALT/Grant Snoop State ........................................................................ 18
2.2.6
Deep Sleep State.................................................................................... 18
2.2.7
Deeper Sleep State................................................................................. 18
2.2.8
Operating System Implications of Low-power States ............................. 19
2.2.9
Enhanced Intel SpeedStep Technology ................................................. 19
2.3
AGTL Signals ....................................................................................................... 19
2.4
Mobile Intel Pentium III Processor-M CPUID....................................................... 20
3.
Electrical Specifications ................................................................................................................. 21
3.1
Processor System Signals ................................................................................... 21
3.1.1
Power Sequencing Requirements .......................................................... 22
3.1.2
Test Access Port (TAP) Connection ....................................................... 23
3.1.3
Catastrophic Thermal Protection ............................................................ 23
3.1.4
Unused Signals....................................................................................... 23
3.1.5
Signal State in Low-power States........................................................... 23
3.1.5.1
System Bus Signals .............................................................. 23
3.1.5.2
CMOS and Open-drain Signals ............................................ 24
3.1.5.3
Other Signals ........................................................................ 24
3.2
Power Supply Requirements ............................................................................... 24
3.2.1
Decoupling Guidelines ............................................................................ 24
3.2.2
Voltage Planes........................................................................................ 25
3.2.3
Voltage Identification............................................................................... 25
3.3
System Bus Clock and Processor Clocking......................................................... 26
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