- 您现在的位置：买卖IC网 > PDF目录69321 > RJ80530LZ001512 (INTEL CORP) 32-BIT, 1000 MHz, MICROPROCESSOR, CPGA478 PDF资料下载
参数资料
| 型号： | RJ80530LZ001512 |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 1000 MHz, MICROPROCESSOR, CPGA478 |
| 封装： | MICRO, FCPGA-478 |
| 文件页数： | 53/96页 |
| 文件大小： | 2018K |
| 代理商： | RJ80530LZ001512 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页当前第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页
System Signal Simulations
R
Mobile Intel
Pentium III Processor-M Datasheet
57
reliability of the processor. The overshoot and undershoot specifications for non-AGTL signals are
shown in Table 35. Ringback must not exceed the CMOS VIH and VIL specification levels in Table 18.
Table 35. Non-AGTL Signal Group Overshoot/Undershoot Tolerance at the Processor Core
Allowed Pulse Duration (ns) [Tj=100C]
Max VCmos + Overshoot/Undershoot
Magnitude (volts)
Activity Factor = 0.01 Activity Factor = 0.1
Activity Factor = 1
2.38
6.5
0.65
0.065
2.33
13
1.3
0.13
2.28
29
2.9
0.29
2.23
60
6
0.6
2.18
60
12
1.2
2.13
60
26
2.6
2.08
60
56
5.6
NOTES:
1.
VCMOS(nominal) = 1.5 V.
2.
Under no circumstances should the sum of the Max VCMOS and absolute value of the Overshoot/Undershoot
voltage exceed 2.38 V.
3.
Activity factor of 1 represents a toggle rate of 33 MHz.
4.
System designers are encouraged to follow Intel provided non-AGTL layout guidelines.
5.
All values are specified by design characterization, and are not tested.
4.3.1
PWRGOOD, VTTPWRGD Signal Quality Specifications
The processor requires PWRGOOD to be a clean indication that clocks and the power supplies (VCC,
VCCT, etc.) are stable and within their specifications. Clean implies that the signal will remain below
VIL18 and without errors from the time that the power supplies are turned on, until they come within
specification. The signal will then transition monotonically to a high (1.8 V) state. The VTTPWRGD
signal must also transition monotonically.
The VTTPWRGD signal is an input to the processor used to determine that the VTT power is stable
and the VID and BSEL signals should be driven to their final state by the processor. To ensure the
processor correctly reads this signal, it must meet the requirements shown in Table 36 while the signal
is in its transition region of 300 mV to 900 mV. Also, VTTPWRGD should only enter the transition
region once, after VTT is at nominal values, for the assertion of the signal.
4.3.1.1.1
VTTPWRGD Noise Parameter Specification
Table 36. VTTPWRGD Noise Parameter Specification
Parameter
Specification
Amount of noise (glitch)
Less than 100 mV
In addition, the VTTPWRGD signal should have reasonable transition time through the transition
region. A sharp edge on the signal transition will minimize the chance of noise causing a glitch on this
signal. Intel recommends the following transition time for the VTTPWRGD signal.
相关PDF资料 |
PDF描述 |
|---|---|
| RH80530GZ012512 | 32-BIT, 1266 MHz, MICROPROCESSOR, CPGA478 |
| RH80530NZ006256 | 32-BIT, 1133 MHz, MICROPROCESSOR, CPGA478 |
| RJ80530VZ733256 | 32-BIT, 733 MHz, MICROPROCESSOR, PBGA479 |
| RH80530NZ001256 | 32-BIT, 1000 MHz, MICROPROCESSOR, CPGA478 |
| RJ80530VY700256 | 32-BIT, 700 MHz, MICROPROCESSOR, PBGA479 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RJ80530LZ733512 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RJ80530LZ733512S L5QS | 制造商:Intel 功能描述:MPU Pentium? III Processor 64-Bit 0.13um 733MHz 479-Pin uFCBGA |
| RJ80530LZ866512 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RJ80530LZ933512 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RJ80530LZ933512S L68W | 制造商:Intel 功能描述:MPU Pentium? III Processor-M 64-Bit 0.13um 933MHz 479-Pin uFCBGA |
发布紧急采购，3分钟左右您将得到回复。