- 您现在的位置：买卖IC网 > PDF目录69326 > S1S60000F00A100 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 PDF资料下载
参数资料
| 型号： | S1S60000F00A100 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP15-100 |
| 文件页数： | 13/83页 |
| 文件大小： | 1024K |
| 代理商： | S1S60000F00A100 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页当前第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页
S1S60000 Technical Manual
14
EPSON
Rev.1.5
Operation of OSC3 oscillation circuit is started by the initial reset (RESET#=LOW) and then CPU is started by
OSC3 clock at the positive going edge of the reset signal.
OSC3 oscillation circuit takes some time until its
oscillation stabilizes(VDD=3V, the time required for stabilized oscillation under normal operation condition: 10ms
Max.).
Thus, in order to ensure positive start of CPU, be sure to release the initial reset only after this time has
been elapsed.
Make sure that length of the initial reset pulse is longer than the above oscillation stabilizing
time.
Fig.2.1 shows the timing chart at the power on reset.
Fig.2.1
Power on Reset Timing
After powering on, maintain RESET# pin below 0.1 VDD (LOW level) until supply voltage reaches the
oscillation start voltage (3.0V) or above.
It is also required to maintain RESET# pin below 0.5 VDD until
oscillation of OSC3 oscillation circuit is stabilized.
Note: Oscillation start time of OSC3 oscillation circuit depends on the device substrate pattern used as well as
the operating environment.
So you must be sure to provide enough time before releasing the reset.
Reset pulse
When S1S60000 is in operation, it is possible to implement the initial reset by inputting LOW level pulse to the
RESET# pin.
In this case, however, the pulse width used must be greater than the minimum reset pulse width listed in the “AC
Characteristics”.
When applying reset pulse while OSC3 oscillation circuit is not in operation, RESET# pin must be maintained at
LOW level for a period longer than the oscillation stabilization time.
It is the same requirement as that for the
power on reset.
Check of Resetting Operation
When S1S60000 hardware started operating after normal resetting, signals EP_SK and EP_CS change for
checking connection of the EEPROM. also, when the S1S60000 software started operating, signals MII_MDC
and MII_MDIO change for checking connection of the PHY chip. If these signals do not change, check the
power supply, the OSC3 clock, state of the RESET# pin and setting of the PLLC pin.
When the initialization with the firmware completes, the BOOT status (000Bh) can be read from the host
interface. (But, this does not apply when HIFSEL [2:0] pin is “111” and HIFSEL [2:0] of the HIFCR register is
“111.” In this setting, it is understood that “the host interface is not connected.”)
2.6
OSC3 Clock
Operating clock for S1S60000 is entered to OSC3 pin.
For the internal bus and CPU operation, the clock
entered from OSC3 is used after it has been doubled.
Normally, 25MHz clock is used.
The lowest frequency
allowed to input is 10MHz.
While the power save mode is turned on, the internal bus clock and CPU operating clock is reduced to 1/4 of the
normal operation (1/2 of that input from OSC3).
When operating S1S60000 on 100BASE-TX, be sure to enter 25MHz to OSC3 and operate S1S60000 in the
normal mode.
Note that it cannot operate in the power saving mode.
VDD
RESET#
tSTA3 (OSC3 oscillation start time) Min.
3.0V(VDD=3.3V)
0.5VDD
0.1VDD
Powering on
相关PDF资料 |
PDF描述 |
|---|---|
| S202T01 | TRIGGER OUTPUT SOLID STATE RELAY, 3000 V ISOLATION-MAX |
| S102T01 | TRIGGER OUTPUT SOLID STATE RELAY, 3000 V ISOLATION-MAX |
| S3C4510BXX-QE | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP208 |
| S3C72E8XX-QX | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP100 |
| S3C72N4XX-QT | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S1S60000F00A300 | 制造商:Epson Electronics America Inc 功能描述:IC NETWORK CONTROLLER |
| S1S60000F00A30B | 制造商:Epson Electronics America Inc 功能描述:IC NETWORK CONTROLLER |
| S1S60000F00A500 | 制造商:Epson Electronics America Inc 功能描述:IC NETWORK CONTROLLER |
| S1S65000F00A100 | 功能描述:IC WEB CAMERA 128-QFP RoHS:否 类别:集成电路 (IC) >> 专用 IC 系列:* 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 标准包装:1 系列:- 类型:调帧器 应用:数据传输 安装类型:表面贴装 封装/外壳:400-BBGA 供应商设备封装:400-PBGA（27x27） 包装:散装 |
| S1S65010 | 制造商:EPSON 制造商全称:EPSON 功能描述:Network Camera Controller with JPEG Encoder |
发布紧急采购，3分钟左右您将得到回复。