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| 型号： | S1S60000F00A100 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP15-100 |
| 文件页数： | 14/83页 |
| 文件大小： | 1024K |
| 代理商： | S1S60000F00A100 |
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S1S60000 Technical Manual
Rev.1.5
EPSON
15
3.
NETWORK INTERFACE
3.1
MII Interface
S1S60000 employs MII (Media Independent Interface) for connection with the physical layer (PHY chip)
enabling it to connect various network PHY chips designed for MII.
For the detail of MII, refer to IEEE 802.3
Clause 22 (IEEE 802.3
). However, your attention is required on the following points.
CRS (Carrier Sense) signal
This signal is not used in Full Duplex communication.
Connect CRS signal to GPIO2 pin only when Half
Duplex communication is to take place.
Also, when setting PHY forcibly to Half Duplex communication, Half
Duplex must be set on GENCR.
TX_ER signal
This signal is used to propagate the error received with RX_ER.
This signal, however, is not used on S1S60000
since it does have a repeating function.
Fig.3.1 and 3.2 show MII transmit waveform and MII receive waveform, respectively.
In transmission, MII_TXEN is set to HIGH level and then level of MII_TXD is changed after MII_TXCLK has
reached HIGH level.
In Half Duplex communication, interrupt occurs in S1S60000 as MII_COL goes HIGH
level thereby forcing MII_TXEN to LOW level and suspending transmission.
Then transmission is resumed
after a predetermined time.
In receiving, after MII_RXDV has reached HIGH level, MII_RXD is acquired at positive-going edge of
MII_RXCLK.
If MII_RXER goes HIGH level while communicating with 100BASE-TX, FCS error is set after
receiving is complete and the received frames are disposed.
Fig.3.1
MII Transmit Waveform
Fig.3.2
MII Receive Waveform
MII_RXCLK
MII_RXDV
MII_RXD[3:0]
DATA
MII_RXER
MII_TXCLK
MII_TXEN
MII_TXD[3:0]
DATA
MII_COL
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