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参数资料
| 型号： | S1S60000F00A100 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP15-100 |
| 文件页数： | 54/83页 |
| 文件大小： | 1024K |
| 代理商： | S1S60000F00A100 |
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S1S60000 Technical Manual
52
EPSON
Rev.1.5
5.4
I2C
I2C is an Inter IC Bus developed by Philips.
S1S60000 contains the I2C master/slave function.
Following
describes features of the function.
Master/slave transmission and reception
Bus arbitration function
Clock synchronization function
Restart generating function
Bus error detecting function
Programmable noise cancel function
10-bit/7-bit master/slave addressing
Supports Standard mode (Max. 100Kbps) /HIGH-speed mode (Max.400Kbps)
Support multi-master
Fig.5.1 shows the basic format of I2C bus transfer.
Fig.5.1
I2C Basic Format
[ Precautions ]
When ACK is returned from S1S60000, the response time fluctuates (because response is returned after
processing with software inside S1S60000).
During the time, S1S60000 maintains SCL at the LOW level to
extend the period up to ACK.
Note that the time varies with the internal processing state.
5.4.1
Master Function
Master function of S1S60000 supports the multi-master.
When another master device is present on I2C bus,
this function synchronizes the clock.
Thus, as long another master device maintains SCL signal at LOW level,
S1S60000 refrains from latching SDA.
This arrangement enables to specify the minimum HIGH or LOW
retaining period of SCL on I2CCONF register thereby allowing the I2C bus clock to change responding to the
period.
Procedure of communication with master device
Following describes the communication procedure when S1S60000 is the master and the external device is the
slave.
[ Procedure 1 ]
Addressing coding procedure
When the external device has the automatic address increment function, data can be continuously sent once the
addressing is done at the start.
The received address is added on byte basis.
(1) S1S60000 sends the start condition
(2) S1S60000 sends the slave address of the external device and R/W bit from the write mode
(3) Confirms acknowledge from the external device
(4) S1S60000 sends the address to be written to the external device
(5) Confirms acknowledge from the external device
(6) S1S60000 sends the data to be written to the address specified in step (4) above
(7) Confirms acknowledge from the external device
(8) Above (6) and (7) are repeated as needed. Addresses are automatically incremented in the external
device.
(9) S1S60000 sends the stop condition
SCL
SDA
1
2
3
4
5
6
7
8
9
S
or
Sr
MSB
ACK
STOP
LSB
P
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