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| 型号： | S1S60000F00A100 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP15-100 |
| 文件页数： | 63/83页 |
| 文件大小： | 1024K |
| 代理商： | S1S60000F00A100 |
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S1S60000 Technical Manual
60
EPSON
Rev.1.5
7.
PRECAUTIONS ON IMPLEMENTATION
Following describes the precautions to be heeded when designing substrates and implementing ICs.
Oscillation circuit
Oscillation characteristics vary depending on given conditions (such as parts used and substrate patterns).
In particular, when using ceramic or crystal transducers, maker specified constants of components such as
capacitance and resistance should be strictly observed.
Disturbance of oscillation clock due to noises can cause malfunctioning. Pay attention to the following in
order to prevent above trouble.
(1) Be sure to minimize the distance when connecting parts such as transducer, resistor and capacitor to
OSC3 (OSC1), OSC4 (OSC2) and PLLC pin.
(2) Be sure to provide as much VSS pattern as possible to OSC3 (OSC1) and OSC4 (OSC2) pins as well as
to peripheral areas of the parts connected to these pins. The same applies to PLLC pin, too. Don’t try
to connect non-oscillation system parts to this VSS pattern.
(3) When entering external clock to OSC3 (OSC1) pin, be sure to minimize the distance from the clock
source. In this case, OSC4 (OSC2) pin must be made open.
In order to prevent unstable operation of the oscillation circuit due to leak current across OSC3 (OSC1) -
VDD, be sure to locate OSC3(OSC1) sufficiently away from VDD power supply and signal line on the
substrate pattern.
When feeding clock to PHY chip by use of OSCO pin, try to minimize the pattern length. And, make sure
that the clock satisfies the frequency accuracy required by PHY.
Reset circuit
Reset signal entered to RESET# pin at powering on is affected by factors (such as turn on time of power
supply, parts used and substrate patterns). Before employing the constants such as capacitance and
resistance, be sure to test them carefully using applied products. As for the pull-up resister of RESET# pin,
dispersion of resistance values must be carefully studied before finalizing the constant.
In order to prevent the reset due to noise during operation, be sure to connect the parts such as capacitor
and resistor to RESET# pin with the minimum distance.
Power supply circuit
Sudden fluctuations in voltage due to noise can cause malfunctioning. In order to prevent above trouble,
following rules should be observed.
(1) Use the shortest and thickest pattern as much as practicable for the connection between power supply
and VDD or VSS pin.
(2) Connect VDD pin and VSS pin with the minimum distance when connecting a bypass capacitor across
VDD - VSS.
Layout of signal line
Don’t route a large current signal line near to circuits susceptible to noise (such as oscillation circuit).
This rule must be observed in order to prevent electromagnetic induced noise resulting from mutual
inductance.
If a HIGH-speed signal line is routed for a long distance in parallel with another signal line or if such line is
routed across another line, noises can be generated from mutual interference between the signals resulting
in the system malfunctioning. In particular, you must avoid routing a HIGH-speed signal line near to the
circuits susceptible to noises.
Network block
Don’t route the signal lines for signals input to and output from PHY (such as TXP, TXN, RXP, and XN)
near to the oscillation block.
Processing Unused Pins
Unused GPIO pins should either be set for output, or their input levels should be fixed with pull-up or
pull-down resistors. (Avoid connecting them directly to VDD or VSS. Inadvertently setting output could
result in overcurrent flow and destruction of the chip.)
If the environment contains lots of noise, pins should be provided with external pull-up/pull-down resistors
even if they are provided with internal pull-up/pull-down.
Pins 76 and 77 are reserved for external circuit connections that will be required with a planned low-cost
replacements (a mask ROM version). For more details, please refer to “Technical Information No. 25
(SIS60000t1-025)”
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