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参数资料
| 型号： | S1S60000F00A100 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP15-100 |
| 文件页数： | 65/83页 |
| 文件大小： | 1024K |
| 代理商： | S1S60000F00A100 |
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S1S60000 Technical Manual
62
EPSON
Rev.1.5
8.3
DC Characteristics
(Except where otherwise specified: VDD=3.0V to 3.6V, Ta=-40°C to
+85°C)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit Note
Static current consumption
IDDS
Static state, Tj=85°C
-
120
A
Large leak current
ILI
-1
-
1
A
Off-state leak current
IOZ
-1
-
1
A
HIGH level output voltage
VOH
IOH=-2mA (Type1),
IOH=-6mA (Type2), VDD=Min.
VDD
-0.4
-
V
LOW level output voltage
VOL
IOL=2mA (Type1),
IOL=6mA (Type2), VDD=Min.
-
0.4
V
HIGH level input voltage
VIH
CMOS level, VDD=Max.
2.4
-
V
LOW level input voltage
VIL
CMOS level, VDD=Min.
-
0.4
V
Positive trigger input voltage
VT+
CMOS Schmitt, VDD=Max.
1.1
-
2.4
V
Negative trigger input
voltage
VT-
CMOS Schmitt, VDD=Min.
0.6
-
1.8
V
Hysteresis voltage
VH
CMOS Schmitt
0.1
-
V
Pull-up resistor
RPU
VI=0V
Other than DSIO
80
200
480
k
DSIO
40
100
240
k
Pull-down resistor
RPD
VI=VDD (TEST0,TEST1)
40
100
240
k
Input pin capacitance
CI
f=1MHz, VDD =0V
-
10
pF
Output pin capacitance
CO
f=1MHz, VDD =0V
-
10
pF
Input/output pin capacitance
CIO
f=1MHz, VDD =0V
-
10
pF
Note: For the characteristics of pins, refer to “Appendix B List of Pin Characteristics”.
8.4
Current consumption
(Except where otherwise specified: VDD=3.0V to 3.6V, Ta=-40°C to
+85°C)
Item
Symbol
Condition
Min.
Typ.
Max.
Unit Note
Current consumption
IDD1
fCPU=50MHz
-
100
120
mA
1
When power save mode is
turned on
IDD2
fCPU=12.5MHz
-
80
100
mA
2
When sleep mode is turned
on
IDD3
OSC1 oscillation is 32.768kHz
-
30
120
mA
3
1: When transmission and reception are conducted at the same time by use f internal loop back.
2: OSC3 and OSC1 are operated.
3: OSC3 is stopped and OSC1 is operated.
8.5
AC Characteristics
8.5.1
Description of Symbols
tCYC: Bus clock cycle time : Depends on OSC3 input value.
When OSC3 input = 25MHz, the internal bus clock = 50MHz :
tCYC = 20ns
8.5.2
AC Characteristics Measuring Condition
Signal detection level:
Input signal
HIGH level
VIH=VDD-0.4V
LOW level
VIL=0.4V
Output signal HIGH level
VOH=1/2 VDD
LOW level
VOL=1/2 VDD
Following conditions are assumed when external clock is entered to OSC3
Input signal
HIGH level
VIH=1/2 VDD
LOW level
VIL=1/2 VDD
Input signal waveform:
Rise (10%
→90%VDD)
5ns
Fall (90%
→10%VDD)
5ns
Output load capacitance:
CL=50pF
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