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参数资料
| 型号： | S1S60000F00A100 |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 2M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, 1.40 MM HEIGHT, PLASTIC, QFP15-100 |
| 文件页数： | 48/83页 |
| 文件大小： | 1024K |
| 代理商： | S1S60000F00A100 |
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S1S60000 Technical Manual
46
EPSON
Rev.1.5
5.2.15
ANEGR
(Auto Negotiation Result Information Register: offset 10h)
It is used to specify the storing method for the auto-negotiation function result of the PHY chip.
S1S60000
selects internal processing for respective operating states by using this information. Refer to the data sheet of
PHY to be used and set an appropriate value.
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
LSOFF[3:0]
Reserved
DINV
SINV
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
DUPLEX[3:0]
SPEED[3:0]
bit
Name
Init.
Description
15:12
LSOFF
0001
Link Status Offset: When the link is attempted through the auto-negotiation,
which is unique to the PHY chip, is carried out, it is used to specify the position
of MII management interface register to store the negotiation result as an
offset from index 16.
When it is 111, however, the index is 0.
0000: Index 16 register stores result of the attempt to establish the link.
0001: Index 17 register stores result of the attempt to establish the link.
...
1110: Index 30 register stores result of the attempt to establish the link.
1111: Index 0 register stores result of the attempt to establish the link.
11:10
Reserved
00
Reserved.
Be sure to set 0.
9
DINV
0
Duplex Invert: Used to change the meaning of bit being specified for DUPLEX.
0: When Bit[DUPLEX]=1, Full Duplex and when Bit[DUPLEX]=0, Half
Duplex.
1: When Bit[DUPLEX]=1, Half Duplex and when Bit[DUPLEX]=0, Full
Duplex.
8
SINV
0
Speed Invert: Used to change the meaning of bit being specified with SPEED.
0: When Bit[SPEED]=1, 100BASE and when Bit[SPEED]=0, 10BASE.
1: When Bit[SPEED]=1, 10BASE and when Bit[SPEED]=0, 100BASE.
7:4
DUPLEX
1110
Duplex bit:
It is used to specify the position of the bits to indicate the Duplex mode in the
register storing the result of the auto-negotiation (indicated with LSOFF)/
1111: bit15, 1110: bit14, ... 0001: bit1, 0000: bit0
3:0
SPEED
1111
Speed bit:
It is used to specify the position of the bits to indicate the link speed in the
register storing the result of the auto-negotiation (indicated with LSOFF).
1111: bit15, 1110: bit14, ... 0001: bit1, 0000: bit0
Setup example :
ICS1893-Y of ICS Company stores results of the auto negotiation in the register of Index 17, allocates the link
speed to bit15 and the Duplex mode to bit14. Thus, the setup is as follows:
LSOFF=0001, DINV=0, SINV=0, DUPLEX=1110, SPEED=1111.
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