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参数资料
| 型号： | SII3531ACNU |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, QCC48 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48 |
| 文件页数： | 16/81页 |
| 文件大小： | 532K |
| 代理商： | SII3531ACNU |
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PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
23
The host may issue commands to any number of available command slots. The host may freely intermix non-queued, legacy
queued, native queued, PIO, and DMA command types in any available slot. Commands will always be executed in the order
that they were issued. The SiI3531A will enforce command type issuance to the SATA device and will not allow incompatible
command types to be issued to a device. This relieves the host of the burden of making sure that incompatible command
types are not intermixed in the device.
It is the host’s responsibility to manage slot usage. The host must keep track of which slots have commands outstanding and
which slots are available for new commands. Issuing a command to a slot that is currently in use will result in unpredictable
behavior.
For queued commands, the slot number is used as the queue tag. It is the host’s responsibility to ensure that the tag number
in the Register-Host To Device FIS defined in the PRB matches the slot number to which the command is issued.
5.3.2
The Scatter/Gather Entry (SGE)
A scatter/gather entry (SGE) defines a region of host memory to be used for data transfer associated with a command. Each
scatter/gather entry defines a single contiguous physically addressed region.
31
0
Data Address Low
0x00
Data Address High
0x04
Data Count
0x08
TRM (31)
LNK (30)
DRD (29)
XCF (28)
Reserved[27:0]
0x0C
Table 5-1 Scatter/Gather Entry (SGE)
The first quadword, at offset 0, contains the physical address of the region in host memory. The entire 64-bit address must be
defined. On 32-bit systems the upper 32 bits must be zero. The data address may point to a region to be used for data
transfer, or it may point to a scatter/gather table (SGT), which is a collection of four SGEs. The LNK bit (bit 30 at offset 0x0c)
defines the type of region. When LNK is zero, the region is a data region; when LNK is one, the region is a scatter/gather
table that will be fetched by the SiI3531A to obtain a data region definition.
The Data Count field at offset 0x08 defines the length, in bytes, of the contiguous data region. When the LNK bit is set to one,
indicating an SGT link, the SiI3531A ignores this field.
The TRM bit (bit 31 at offset 0x0c), when set to one, indicates that this is the final SGE associated with the command and no
additional SGEs follow it.
The DRD bit (bit 29 at offset 0x0c), when set to one, directs the SiI3531A to discard the data read from the device for the
length associated with the data count. When this bit is set to one, the SiI3531A ignores the data address.
The XCF bit (bit 28 at offset 0x0c) indicates whether the region defined by this SGE is to be used for data transfer (XCF set to
zero) or an external command fetch (XCF set to one). See section 5.3.10 for additional information on external command
processing.
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相关代理商/技术参数 |
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