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参数资料
| 型号： | SII3531ACNU |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, QCC48 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48 |
| 文件页数： | 59/81页 |
| 文件大小： | 532K |
| 代理商： | SII3531ACNU |
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PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
62
6.3.1
Port LRAM
Address Offset: 000H-FFFH
Access Type: Read/Write
Reset Value: indeterminate
The Port LRAM consists of 31 Slots of 128 bytes each and a 32
nd “Slot” used to hold 16 Port Multiplier Device Specific
Registers.
Address Offset
Description
000H-07FH
Slot 0
080H-0FFH
Slot 1
100H-17FH
Slot 2
180H-EFFH
Slots 3-29
F00H-F7FH
Slot 30
F80H-F83H
Port Multiplier Device 0 Status Register
F84H-F87H
Port Multiplier Device 0 QActive Register
F88H-F8BH
Port Multiplier Device 1 Status Register
F8CH-F8FH
Port Multiplier Device 1 QActive Register
F90H-FF7H
Port Multiplier Device Registers for Devices 2-14
FF8H-FFBH
Port Multiplier Device 15 Status Register
FFCH-FFFH
Port Multiplier Device 15 QActive Register
Table 6-4 Port LRAM layout
Address Offset
Description
000H-01FH
Current FIS and Control
020H-02FH
Scatter/Gather Entry 0 or ATAPI command packet
030H-03FH
Scatter/Gather Entry 1
Port Request
Block (PRB)
040H-047H
Command Activation Register (Actual)
040H-07FH
Scatter/Gather Table
1C00H-1C07H
Command Activation Register (Shadow)
Table 6-5 Port LRAM Slot layout
A Port LRAM Slot is 128 bytes used to define Serial-ATA commands. The addresses shown above are for slot 0.
6.3.1.1
Command Activation Register
The Command Activation Register is written using a shadow address. The Command Execution State Machine overwrites it
when the Scatter/Gather Table is fetched. The translation of the shadow address to the actual LRAM address is shown here:
Address bit
12
11
10
9
8
7
6
5
4
3
210
Shadow Activation Register Address
1
0
Slot Number
000
Actual Activation Register LRAM Address
0
Slot Number
1
0
000
Table 6-6 Command Activation Register Address Translation
6.3.1.2
Port Multiplier Device Specific Registers
The Port Multiplier Device Specific Registers are 16 registers that contain the SActive register and the Diagnostic register for
each of the 16 devices that may be connected to a Port Multiplier. Besides being directly addressable in the LRAM address
space, the currently selected Port Multiplier Port SActive register may be indirectly addressed at offset 1F0CH. The LRAM
address for this indirect (read-only) access is derived as shown here:
Address bit
12
11
10
9
8
7
6
5
4
3
210
SActive Indirect Register Address
1
0
1
100
Actual LRAM Address
0
1
PMP (in SControl)
000
Table 6-7 SActive Indirect Address Translation
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