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参数资料
| 型号： | SII3531ACNU |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, QCC48 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48 |
| 文件页数： | 77/81页 |
| 文件大小： | 532K |
| 代理商： | SII3531ACNU |
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PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
79
7 Power Management
The following register bits control Power Management in the SiI3531A Port.
Register
Bits
Description
Interrupt Status
PM Change
Bit 3
This bit reports a change in the Power Management mode. It corresponds to the
interrupt enabled by bit 3 of the Port Interrupt Enable register.
SError
W
Bit 18
Interrupt Status
ComWake
Bit 5
This bit reports a ComWake received from the Serial ATA bus. It corresponds to
the interrupt enabled by bit 5 of the Port Interrupt Enable register.
SControl
SPM
Bits 15-12
This bit field initiates transitions to/from Partial or Slumber power management
states; bit 14 corresponds to ComWake (exit power management); bit 13
corresponds to Slumber mode; bit 12 corresponds to Partial mode.
SControl
IPM
Bits 11-8
This bit field disables transitions to Partial or Slumber power management states;
bit 9 corresponds to Slumber mode; bit 8 corresponds to Partial mode.
SStatus
IPM
Bits 11-8
This bit field reports the power management state; ‘0110’ corresponds to Slumber
mode; ‘0010’ corresponds to Partial mode.
Table 7-1 Power Management Register Bits
There are two power management modes: Partial and Slumber. These power management modes may be software initiated
through the SControl register or device initiated from the Serial ATA device.
Transitions to and from either power management mode generate an interrupt, the Power Management Mode Change
Interrupt, which may be masked in the Port Interrupt Enable register (bit 3).
Partial/Slumber mode may be initiated by software through the SControl register. By setting the SPM field to either ‘0001’
(Partial) or ’0010’ (Slumber), software causes a PMREQ to the Serial ATA device, which will respond with either a PMACK or
PMNAK. If a PMACK is received the Partial/Slumber mode is entered. A PMNAK is ignored; the request remains asserted.
The Serial ATA device may initiate Partial/Slumber mode. Software enables the acknowledgement of this request by setting
the IPM field in the SControl register to ‘0001’ (Partial), ‘0010’ (Slumber), or ‘0011’ (Partial or Slumber). If enabled, a PMACK
will be sent to the device; if not enabled, a PMNAK will be sent. When the request is received and its acknowledgement is
enabled, Partial/Slumber mode is entered.
Partial/Slumber mode status is reported in the SStatus register (‘0010’/’0110’ in the IPM field).
Partial/Slumber mode is cleared by ComWake (asserted when the SPM field is set to ‘0100’).
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