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参数资料
| 型号： | SII3531ACNU |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, QCC48 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48 |
| 文件页数： | 41/81页 |
| 文件大小： | 532K |
| 代理商： | SII3531ACNU |
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PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
46
6.1.6
Base Address Register 1
Address Offset: 18H
Access Type: Read/Write
Reset Value: 0x0000_0000_0000_0004
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
Base Address Register 1
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Base Address Register 1
0 0000 0000 0100
This register defines the addressing of the Port Registers and LRAM within the SiI3531A. The register bits are defined below.
Bit [63:13]: Base Address Register 1 (R/W). This register defines the base address for the 16Kbyte Memory
Space containing the Port Registers.
Bit [12:00]: (R). This bit field is hardwired to 0004H to indicate a 64-bit base address.
6.1.7
Base Address Register 2
Address Offset: 20H
Access Type: Read/Write
Reset Value: 0x0000_0001
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Base Address Register 2
000 0001
This register defines the addressing of the Indirect I/O registers within the SiI3531A. The register bits are defined below.
Bit [31:04]: Base Address Register 2 (R/W). This register defines the base address for the 128-byte I/O Space.
Bit [03:00]: (R). This bit field is hardwired to 000_0001B.
6.1.8
Subsystem ID – Subsystem Vendor ID
Address Offset: 2CH
Access Type: Read/Write
Reset Value: 0x3531_1095
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Subsystem ID
Subsystem Vendor ID
This register defines the Subsystem ID fields associated with the PCI bus. The register bits are defined below.
Bit [31:16]: Subsystem ID (R/W) – Subsystem ID.
The value in this bit field is one of the following:
the default value of 0x3531
system programmed value; if bit 0 of the Configuration register (48H) is set the Subsystem ID is system
programmable.
Bit [15:00]: Subsystem Vendor ID (R/W) – Subsystem Vendor ID.
The value in this bit field is one of the following:
the default value of 0x1095
system programmed value; if bit 0 of the Configuration register (48H) is set the Subsystem Vendor ID is
system programmable.
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