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参数资料
| 型号： | SII3531ACNU |
| 元件分类： | 总线控制器 |
| 英文描述： | PCI BUS CONTROLLER, QCC48 |
| 封装： | 7 X 7 MM, 0.40 MM PITCH, LEAD FREE, QFN-48 |
| 文件页数： | 73/81页 |
| 文件大小： | 532K |
| 代理商： | SII3531ACNU |
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PCI Express to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0208-C
75
0010
Limit to Generation 2 (3.0 Gb/s)
others
Reserved
Bit [03:00]: DET (R/W) – This field controls host adapter device detection and interface initialization.
Value
Action
0000
No action
0001
COMRESET is periodically generated until another value is written to the field
0100
No action
Others
Reserved, no action
6.3.21 SStatus
Address Offset: 1F04H
Access Type: Read
Reset Value: 0x0000_0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
Reserved
IPM
SPD
DET
This register is the SStatus register as defined by the Serial ATA specification (section 10.1.1).
Bit [31:12]: Reserved (R). This bit field is reserved and returns zeros on a read.
Bit [11:08]: IPM (R) – This field identifies the current interface power management state.
Value
Definition
0000
Device not present or communication not established
0001
Interface in active state
0010
Interface in Partial power management state
0110
Interface in Slumber power management state
Others
Reserved
Bit [07:04]: SPD (R) – This field identifies the negotiated interface communication speed.
Value
Definition
0000
No negotiated speed (reported if phygood false)
0001
Generation 1 communication rate (1.5 Gb/s)
0010
Generation 2 communication rate (3.0 Gb/s)
Others
Reserved
Bit [03:00]: DET (R) – This field indicates the interface device detection and PHY state.
Value
Action
0000
No device detected and PHY communication not established (phygood false)
0001
Device presence detected but PHY communication not established
0011
Device presence detected and PHY communication established (phygood true)
0100
PHY in offline mode as a result of the interface being disabled or running in a BIST
loopback mode
Others
Reserved, no action
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