- 您现在的位置：买卖IC网 > PDF目录69541 > W9725G6IB-18 (WINBOND ELECTRONICS CORP) 16M X 16 DDR DRAM, 0.35 ns, PBGA84 PDF资料下载
参数资料
| 型号： | W9725G6IB-18 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 16 DDR DRAM, 0.35 ns, PBGA84 |
| 封装： | 8 X 12.50 MM, ROHS COMPLIANT, WBGA-84 |
| 文件页数： | 17/69页 |
| 文件大小： | 1644K |
| 代理商： | W9725G6IB-18 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页
PRELIMINARY W9725G6IB
Publication Release Date:Nov. 14, 2008
- 24 -
Revision P04
CMD
1
2
3
4
5
6
7
8
9
10
11
12
0
-1
CLK /CLK
DQS/DQS
DQ
AL=2
CL=3
WL=RL-1=4
≧ tRCD
RL=AL+CL=5
Dout0
Din0
Active
A-Bank
Read
A-Bank
Write
A-Bank
Din1
Din2
Din3
Dout1 Dout2 Dout3
[AL = 2 and CL = 3, RL = (AL + CL) = 5, WL = (RL - 1) = 4, BL = 4]
Figure 14
—
—Example 1: Read followed by a write to the same bank,
where AL = 2 and CL = 3, RL = (AL + CL) = 5, WL = (RL - 1) = 4, BL = 4
1
2
3
4
5
6
7
8
9
10
11
12
0
-1
CL=3
WL=RL-1=2
≧ tRCD
RL=AL+CL=3
AL=0
CMD
CLK/CLK
DQ
Dout0 Dout1 Dout2 Dout3
Din0
Din1
Din2
Din3
Write
A-Bank
Read
A-Bank
Active
A-Bank
DQS/DQS
AL = 0 and CL = 3, RL = (AL + CL) = 3, WL = (RL - 1) = 2, BL = 4]
Figure 15
—
—Example 2: Read followed by a write to the same bank,
where AL = 0 and CL = 3, RL = (AL + CL) = 3, WL = (RL - 1) = 2, BL = 4
7.4.2.
Burst mode operation
Burst mode operation is used to provide a constant flow of data to memory locations (write cycle), or
from memory locations (read cycle). The parameters that define how the burst mode will operate are
burst sequence and burst length. The DDR2 SDRAM supports 4 bit and 8 bit burst modes only. For 8
bit burst mode, full interleave address ordering is supported, however, sequential address ordering is
nibble based for ease of implementation. The burst length is programmable and defined by MR A[2:0].
The burst type, either sequential or interleaved, is programmable and defined by MR [A3]. Seamless
burst read or write operations are supported.
Unlike DDR1 devices, interruption of a burst read or writes cycle during BL = 4 mode operation is
prohibited. However in case of BL = 8 mode, interruption of a burst read or write operation is limited to
two cases, reads interrupted by a read, or writes interrupted by a write. (Example timing waveforms
refer to 10.13 and 10.14 Burst read and write interrupt timing diagram in Chapter 10)
相关PDF资料 |
PDF描述 |
|---|---|
| W9864G6EB-7 | 4M X 16 SYNCHRONOUS DRAM, 5.5 ns, PBGA60 |
| WE128K8200CQ | 128K X 8 EEPROM 5V MODULE, 200 ns, CDIP32 |
| WED9LC6816V1512BI | SPECIALTY MEMORY CIRCUIT, PBGA153 |
| WS128K32-35G2TMEA | 128K X 32 MULTI DEVICE SRAM MODULE, 35 ns, CQFP68 |
| WS128K32-55G2TIE | 128K X 32 MULTI DEVICE SRAM MODULE, 55 ns, CQFP68 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W9725G6IB-25 | 功能描述:IC DDR2-800 SDRAM 256MB 84-WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.173"，4.40mm 宽） 供应商设备封装:8-MFP 包装:带卷 (TR) |
| W9725G6JB | 制造商:WINBOND 制造商全称:Winbond 功能描述:4M ? 4 BANKS ? 16 BIT DDR2 SDRAM |
| W9725G6JB-25 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics 功能描述:512MB DDRII |
| W9725G6JB25I | 功能描述:IC DDR2 SDRAM 256MBIT 84WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:150 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-VFDFN 裸露焊盘 供应商设备封装:8-DFN（2x3） 包装:管件 产品目录页面:1445 (CN2011-ZH PDF) |
| W9725G6KB-18 | 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
发布紧急采购，3分钟左右您将得到回复。