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| 型号： | W9725G6IB-18 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | 16M X 16 DDR DRAM, 0.35 ns, PBGA84 |
| 封装： | 8 X 12.50 MM, ROHS COMPLIANT, WBGA-84 |
| 文件页数： | 23/69页 |
| 文件大小： | 1644K |
| 代理商： | W9725G6IB-18 |
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PRELIMINARY W9725G6IB
Publication Release Date:Nov. 14, 2008
- 3 -
Revision P04
9.15.1.
AC Overshoot / Undershoot Specification for Address and Control Pins: ........................49
9.15.2.
AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask pin: ...........49
10.
TIMING WAVEFORMS .......................................................................................................................50
10.1.
Command Input Timing .............................................................................................................50
10.2.
Timing of the CLK Signals .........................................................................................................50
10.3.
ODT Timing for Active/Standby Mode .......................................................................................51
10.4.
ODT Timing for Power Down Mode ...........................................................................................51
10.5.
ODT Timing mode switch at entering power down mode ..........................................................52
10.6.
ODT Timing mode switch at exiting power down mode.............................................................53
10.7.
Data output (read) timing ...........................................................................................................54
10.8.
Burst read operation: RL=5 (AL=2, CL=3, BL=4).......................................................................54
10.9.
Data input (write) timing.............................................................................................................55
10.10.
Burst write operation: RL=5 (AL=2, CL=3, WL=4, BL=4)...........................................................55
10.11.
Seamless burst read operation: RL = 5 ( AL = 2, and CL = 3, BL = 4) ......................................56
10.12.
Seamless burst write operation: RL = 5 ( WL = 4, BL = 4).........................................................56
10.13.
Burst read interrupt timing: RL =3 (CL=3, AL=0, BL=8).............................................................57
10.14.
Burst write interrupt timing: RL=3 (CL=3, AL=0, WL=2, BL=8) ..................................................57
10.15.
Write operation with Data Mask: WL=3, AL=0, BL=4) ...............................................................58
10.16.
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=4, tRTP
≦2clks).............59
10.17.
Burst read operation followed by precharge: RL=4 (AL=1, CL=3, BL=8, tRTP
≦2clks).............59
10.18.
Burst read operation followed by precharge: RL=5 (AL=2, CL=3, BL=4, tRTP
≦2clks).............60
10.19.
Burst read operation followed by precharge: RL=6 (AL=2, CL=4, BL=4, tRTP
≦2clks).............60
10.20.
Burst read operation followed by precharge: RL=4 (AL=0, CL=4, BL=8, tRTP>2clks) ..............61
10.21.
Burst write operation followed by precharge: WL = (RL-1) = 3 ..................................................61
10.22.
Burst write operation followed by precharge: WL = (RL-1) = 4 ..................................................62
10.23.
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=8, tRTP
≦2clks)................62
10.24.
Burst read operation with Auto-precharge: RL=4 (AL=1, CL=3, BL=4, tRTP>2clks) .................63
10.25.
Burst read with Auto-precharge followed by an activation to the same bank (tRC Limit): RL=5
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP
≦2clks) .......................................................................................63
10.26.
Burst read with Auto-precharge followed by an activation to the same bank (tRP Limit): RL=5
(AL=2, CL=3, internal tRCD=3, BL=4, tRTP
≦2clks) .......................................................................................64
10.27.
Burst write with Auto-precharge (tRC Limit): WL=2, WR=2, BL=4, tRP=3.................................64
10.28.
Burst write with Auto-precharge (WR + tRP): WL=4, WR=2, BL=4, tRP=3 ...............................65
10.29.
Self Refresh Timing ...................................................................................................................65
10.30.
Active Power Down Mode Entry and Exit Timing.......................................................................66
10.31.
Precharged Power Down Mode Entry and Exit Timing ..............................................................66
10.32.
Clock frequency change in precharge Power Down mode ........................................................67
11.
PACKAGE SPECIFICATION ..............................................................................................................68
Package Outline WBGA-84 (8x12.5 mm
2).......................................................................................................68
12.
REVISION HISTORY ..........................................................................................................................69
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相关代理商/技术参数 |
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|---|---|
| W9725G6IB-25 | 功能描述:IC DDR2-800 SDRAM 256MB 84-WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:1,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.173"，4.40mm 宽） 供应商设备封装:8-MFP 包装:带卷 (TR) |
| W9725G6JB | 制造商:WINBOND 制造商全称:Winbond 功能描述:4M ? 4 BANKS ? 16 BIT DDR2 SDRAM |
| W9725G6JB-25 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR2 SDRAM 256M-Bit 16Mx16 1.8V 84-Pin WBGA 制造商:Winbond Electronics 功能描述:512MB DDRII |
| W9725G6JB25I | 功能描述:IC DDR2 SDRAM 256MBIT 84WBGA RoHS:是 类别:集成电路 (IC) >> 存储器 系列:- 标准包装:150 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (2 x 256 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.5 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-VFDFN 裸露焊盘 供应商设备封装:8-DFN（2x3） 包装:管件 产品目录页面:1445 (CN2011-ZH PDF) |
| W9725G6KB-18 | 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
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