参数资料
型号: W9725G6IB-18
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 16M X 16 DDR DRAM, 0.35 ns, PBGA84
封装: 8 X 12.50 MM, ROHS COMPLIANT, WBGA-84
文件页数: 41/69页
文件大小: 1644K
代理商: W9725G6IB-18
PRELIMINARY W9725G6IB
Publication Release Date:Nov. 14, 2008
- 46 -
Revision P04
AC Characteristics and Operating Condition for -25/-3 speed grades, continued
SPEED GRADE
DDR2-800 (-25)
DDR2-667 (-3)
UNIT
Bin(CL-tRCD-tRP)
6-6-6
5-5-5
tCK
SYM.
PARAMETER
MIN.
MAX.
MIN.
MAX.
NOTES
tWPRE
Write preamble
0.35
0.35
tCK
tWPST
Write postamble
0.4
0.6
0.4
0.6
tCK
9
tDQSCK
DQS output access time from CLK / CLK
-350
350
-400
400
pS
tDQSQ
DQS-DQ skew for DQS & associated DQ
signals
200
240
pS
10
tRPRE
Read preamble
0.9
1.1
0.9
1.1
tCK
11
tRPST
Read postamble
0.4
0.6
0.4
0.6
tCK
11
tDS(base)
DQ and DM input setup time
50
100
pS
tDH(base)
DQ and DM input hold time
125
175
pS
tDIPW
DQ and DM input pulse width for each input
0.35
0.35
tCK
tHZ
Data-out high-impedance time from CLK/ CLK
tAC,max
tAC,max
pS
11
tLZ(DQS)
DQS/ DQS -low-impedance time from CLK/ CLK
tAC,min
tAC,max
tAC,min
tAC,max
pS
11
tLZ(DQ)
DQ low-impedance time from CLK/ CLK
2 x tAC,min
tAC,max
2 x tAC,min
tAC,max
pS
11
tQHS
Data hold skew factor
300
340
pS
tQH
DQ/DQS output hold time from DQS
tHP - tQHS
tHP - tQHS
pS
tXSNR
Exit Self Refresh to a non-Read command
tRFC + 10
tRFC + 10
nS
tXSRD
Exit Self Refresh to a Read command
200
200
tCK
tXP
Exit precharge power down to any command
2
2
tCK
tXARD
Exit active power down to Read command
2
2
tCK
12
tXARDS
Exit active power down to Read command
(slow exit, lower power)
8 - AL
7 - AL
tCK
12,13
tAOND
ODT turn-on delay
2
tCK
14
tAON
ODT turn-on
tAC,min
tAC,max +
0.7
tAC,min
tAC,max +
0.7
nS
tAONPD
ODT turn-on (Power Down mode)
tAC,min + 2
2 x tCK +
tAC,max + 1
tAC,min + 2
2 x tCK +
tAC,max + 1
nS
tAOFD
ODT turn-off delay
2.5
tCK
tAOF
ODT turn-off
tAC,min
tAC,max +
0.6
tAC,min
tAC,max +
0.6
nS
15
tAOFPD
ODT turn-off (Power Down mode)
tAC,min + 2
2.5 x tCK+
tAC,max+1
tAC,min + 2
2.5 x tCK+
tAC,max+1
nS
tANPD
ODT to power down Entry Latency
3
3
tCK
tAXPD
ODT Power Down Exit Latency
8
tCK
tMRD
Mode Register Set command cycle time
2
2
tCK
tMOD
MRS command to ODT update delay
0
12
0
12
nS
tOIT
OCD Drive mode output delay
0
12
0
12
nS
tDELAY
Minimum time clocks remain ON after CKE
asynchronously drops LOW
tIS+tCK+tIH
tIS+tCK+tIH
nS
16
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