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参数资料
型号： WJLXT384LEB1
厂商： CORTINA SYSTEMS INC
元件分类： 数字传输电路
英文描述： DATACOM, PCM TRANSCEIVER, PQFP144
封装： 20 X 20MM, ROHS COMPLIANT, LQFP-144
文件页数： 60/140页
文件大小： 1514K
代理商： WJLXT384LEB1
26
Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Intel LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
ACK / RDY /
SDO
83
K14
DO
Ready Output.
When the LXT384 Transceiver is in the Host Processor mode
using an Intel
processor and the signal on RDY is:
Low, RDY indicates a data transfer operation is in progress.
High, RDY indicates a register-access operation is
completed.
NOTE: RDY goes into a high-impedance tristate after
completion of a bus cycle.
For other pin functions, see ACK and SDO.
RD / R/W/
LEN1
85
J13
DI
Read/Write Input (Write Is Active Low).
When the LXT384 Transceiver is in the:
Host Processor mode using a Motorola processor, R/W
functions as a read/write signal.
Hardware mode, R/W must be connected to ground.
For other pin functions, see RD.
ALE / AS /
SCLK/LEN2
86
J12
DI
Shift Clock Input.
When SCLK is in the:
Host Processor mode using a serial interface, SCLK acts as
a serial shift clock.
Hardware mode, SCLK must be connected to ground.
For other pin functions, see AS and ALE.
DS / SDI / WR/
LEN0
84
J14
DI
Serial Data Input.
When the LXT384 Transceiver is in the:
Host Processor mode using a serial interface, SDI is used as
serial data input.
Hardware mode, SDI must be connected to ground.
For other pin functions, see DS and WR.
ACK / RDY /
SDO
83
K14
DO
Serial Data Output.
When the LXT384 Transceiver is in the Host Processor mode
using a serial interface and the signal on CLKE is:
Low, SDO is valid on the falling edge of SCLK.
High, SDO is valid on the rising edge of SCLK.
NOTE: SDO goes into a high-impedance tristate during a serial
port write access.
For other pin functions, see ACK and RDY.
DS / SDI / WR/
LEN0
84
J14
DI
Write Enable Input.
When the LXT384 Transceiver is in:
Host Processor mode using an Intel
processor, WR acts as
a write enable.
Hardware mode, WR must be connected to ground.
For other pin functions, see DS and SDI.
Table 7.
Microprocessor-Standard Bus and Interface Signals (Sheet 3 of 3)
Signal
Name
QFP
Pin
PBGA
Ball
Signal
Type
Signal Description
1. DI: Digital Input. DI/O: Digital Bidirectional Port. DO: Digital Output. OD: Open Drain
相关PDF资料
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WJLXT385LEB1 DATACOM, PCM TRANSCEIVER, PQFP144
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