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参数资料
| 型号： | WJLXT384LEB1 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 数字传输电路 |
| 英文描述： | DATACOM, PCM TRANSCEIVER, PQFP144 |
| 封装： | 20 X 20MM, ROHS COMPLIANT, LQFP-144 |
| 文件页数： | 84/140页 |
| 文件大小： | 1514K |
| 代理商： | WJLXT384LEB1 |
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48
Document Number: 248994
Revision Number: 005
Revision Date: November 28, 2005
Intel LXT384 Octal T1/E1/J1 S/H PCM Transceiver with JA
6.3
Receiver
The LXT384 Transceiver has eight identical receivers.
6.3.1
Receiver Clocking
In the receive mode, clocking for the LXT384 Transceiver receiver depends on the following.
When the LXT384 Transceiver is in:
Clock-recovery mode, the RCLK pin provides the recovered clock from the signal received at
RRING and RTIP.
Clock-recovery mode with LOS conditions, at the RCLK output there is a transition from
RCLK (derived from recovered data) to MCLK. For more information on clock-recovery
Data-recovery mode and MCLK is:
— Low, the RCLK pin is in a high-impedance tristate.
— High, the RNEG and RPOS pins are internally connected to an EX-OR output to RCLK
for external clock-recovery applications.
For more information on data-recovery mode, see Section 6.3.4, “Receiver Data Recovery Mode”.
6.3.2
Receiver Inputs
A receiver processes input signals as follows:
1. Through the line interface step-down transformer, typically from either a twisted-pair or a
coaxial cable. (For transformer specifications, see Figure 6 and Chapter 12.0, “Line-Interface-
Unit Circuit Specifications”.) After the transformer, the signal is terminated and is sent to the
receiver section of the LXT384 Transceiver.
2. The receiver inputs, RTIP (receives positive pulses) and RRING (receives negative pulses),
are processed through the internal differential amplifier. The differential amplifier then sends
the signal to the peak detector.
Recovered data is output at RPOS and RNEG in bipolar mode, or at RDATA in unipolar mode.
The recovered clock is output at RCLK. Use the CLKE pin to select the RPOS/RNEG
validation relative to the polarity of the edge of RCLK.
3. The peak detector samples a received signal and determines its maximum peak value.
The receiver can:
— accurately recover signals in excess of 12 dB of attenuation
— receive signal levels well below 500 mV.
Regardless of received signal level, the peak detectors are held above a minimum level of
0.150 V (typical), to provide immunity from impulsive noise.
4. The peak detector sends a percentage of the maximum peak value to the data slicers. This
percentage acts as a threshold level to ensure an optimum signal-to-noise ratio. The threshold
level is typically 50% for E1 applications (see Table 63, “Intel LXT384 Transceiver E1
Receive Transmission Characteristics” on page 103) or 70% for T-1 applications (see
page 104).
相关PDF资料 |
PDF描述 |
|---|---|
| WJLXT385LEB1 | DATACOM, PCM TRANSCEIVER, PQFP144 |
| WJLXT385LEB1 | DATACOM, PCM TRANSCEIVER, PQFP144 |
| WJLXT386LEB2 | DATACOM, PCM TRANSCEIVER, PQFP100 |
| WJLXT386LEB2 | DATACOM, PCM TRANSCEIVER, PQFP100 |
| WJLXT388LEB2 | DATACOM, PCM TRANSCEIVER, PQFP100 |
相关代理商/技术参数 |
参数描述 |
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| WJLXT901ALC.A4 | 功能描述:IC 10BASE-T/AUI TXCVR 64-LQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 驱动器，接收器，收发器 系列:- 标准包装:1,000 系列:- 类型:收发器 驱动器/接收器数:2/2 规程:RS232 电源电压:3 V ~ 5.5 V 安装类型:表面贴装 封装/外壳:16-SOIC（0.295"，7.50mm 宽） 供应商设备封装:16-SOIC 包装:带卷 (TR) |
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