Intel
82865G/82865GV GMCH Datasheet
139
System Address Map
System Address Map
4
The processor in an 865G chipset system supports 4 GB of addressable memory space and 64
KB+3 of addressable I/O space. There is a programmable memory address space under the
1-MB region that is divided into regions that can be individually controlled with programmable
attributes (e.g., disable, read/write, write only, or read only). Attribute programming is described in
Chapter 3
. This section focuses on how the memory space is partitioned and the use of the separate
memory regions.
The Pentium 4 processor family supports addressing of memory ranges larger than 4 GB. The
GMCH claims any processor access over 4 GB and terminates the transaction without forwarding
it to the hub interface or AGP (discarding the data terminates writes). For reads, the GMCH returns
all zeros on the host bus. Note that the 865G chipset platform does not support the PCI Dual
Address Cycle Mechanism; therefore, it does not allow addressing of greater than 4 GB on either
the hub interface or AGP interface.
In the following sections, it is assumed that all of the compatibility memory ranges reside on the
hub interface/PCI. The exception to this rule is VGA ranges that may be mapped to AGP or to the
IGD. In the absence of more specific references, cycle descriptions referencing PCI should be
interpreted as the hub interface/PCI, while cycle descriptions referencing AGP are related to the
AGP bus.
The 865G chipset memory map includes a number of programmable ranges.
Note:
All of these ranges must be unique and non-overlapping. There are no hardware interlocks to
prevent problems in the case of overlapping ranges. Accesses to overlapped ranges may produce
indeterminate results.
4.1
System Memory Address Ranges
The GMCH provides a maximum system memory address decode space of 4 GB. The GMCH does
not remap APIC memory space. The GMCH does not limit system memory space in hardware.
It is
the BIOS or system designers responsibility to limit memory population so that adequate
PCI, AGP, High BIOS, and APIC memory space can be allocated.
Figure 9
provides a
simplified system memory address map.
Figure 10
provides additional details on mapping specific
memory regions as defined and supported by the GMCH.