参数资料
型号: ADE7569ASTZF16
厂商: Analog Devices Inc
文件页数: 53/136页
文件大小: 0K
描述: IC ENERGY METER MCU 16K 64LQFP
标准包装: 1
输入阻抗: *
测量误差: *
电压 - 高输入/输出: *
电压 - 低输入/输出: *
电流 - 电源: *
电源电压: *
测量仪表类型: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-LQFP(10x10)
包装: 托盘
× 1 . 22 μ s = 409 . 6 sec = 6 . 82 min
Preliminary Technical Data
Figure 53 shows this energy accumulation for full-scale signals
(sinusoidal) on the analog inputs. The three displayed curves
illustrate the minimum period of time it takes the energy register
to roll over when the active power gain register contents are
0x7FF, 0x000, and 0x800. The watt gain register is used to carry
out power calibration in the ADE7566/ADE7569. As shown, the
ADE7566/ADE7569
Time =
0 xFFFF, FFFF, FFFF
(16)
0 xCCCCD
When WDIV is set to a value different than 0, the integration
time varies, as shown in Equation 17.
fastest integration time occurs when the watt gain register is set
to maximum full scale, that is, 0x7FF.
WATTHR[23:0]
Time = Time WDIV = 0 × WDIV
Active Energy Accumulation Modes
Watt Signed Accumulation Mode
(17)
0x7F,FFFF
0x3F,FFFF
WGAIN = 0x7FF
WGAIN = 0x000
WGAIN = 0x800
The ADE7566/ADE7569 active energy default accumulation
mode is a watt-signed accumulation based on the active power
information.
Watt Positive-Only Accumulation Mode
0x00,0000
3.41
6.82
10.2
13.7
TIME (Minutes)
The ADE7566/ADE7569 are placed in watt positive-only
accumulation mode by setting the POAM bit in the ACCMODE
Register (0x0F). In this mode, the energy accumulation is only
0x40,0000
0x80,0000
Figure 53. Energy Register Rollover Time for Full-Scale Power
(Minimum and Maximum Power Gain)
Note that the energy register contents roll over to full-scale
negative (0x800000) and continue to increase in value when the
power or energy flow is positive (see Figure 53). Conversely, if
the power is negative, the energy register underflows to full-
scale positive (0x7FFFFF) and continues to decrease in value.
By using the interrupt enable register, the ADE7566/ADE7569
can be configured to issue an ADE interrupt to the 8052 core
when the active energy register is half-full (positive or negative)
or when an overflow or underflow occurs.
Integration Time under Steady Load
As mentioned in the Active Energy Calculation section, the
discrete time sample period (T) for the accumulation register is
1.22 μs (5/CLKIN). With full-scale sinusoidal signals on the
analog inputs and the WGAIN register set to 0x000, the average
done for positive power, ignoring any occurrence of negative
power above or below the no-load threshold (see Figure 54).
The CF pulse also reflects this accumulation method when in
this mode. The default setting for this mode is off. Detection of
the transitions in the direction of power flow and detection of
no-load threshold are active in this mode.
ACTIVE ENERGY
NO-LOAD
THRESHOLD
ACTIVE POWER
NO-LOAD
THRESHOLD
APSIGN FLAG
word value from each LPF2 is 0xCCCCD (see Figure 50). The
POS
NEG
POS
maximum positive value that can be stored in the internal
49-bit register is 2 48 (or 0xFFFF,FFFF,FFFF) before it overflows.
INTERRUPT STATUS REGISTERS
Figure 54. Energy Accumulation in Positive-Only Accumulation Mode
The integration time under these conditions when WDIV = 0 is
calculated in the following equation:
Rev. PrA | Page 53 of 136
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