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参数资料
型号： DSRT-L030-011
厂商： CONEXANT SYSTEMS
元件分类： 消费家电
英文描述： SPECIALTY CONSUMER CIRCUIT, XMA
文件页数： 38/86页
文件大小： 667K
代理商： DSRT-L030-011
RipTide PCI Audio/Comm Device Family Product Description
1167
ROCKWELL PROPRIETARY INFORMATION
43
6.2
DSP Pin Signal Descriptions
6.2.1
System
Signal
Pin No.
I/O
Type
Interface
CLOCKIN/XTLI
27
I
Clock Input. Connect to Controller: MPLLOUT (28 MHz clock).
NC/XTLO
28
O
No Connect. Leave open.
VGG
8
REF
Input Reference Voltage. Reference voltage for +5V tolerant input pins.
Connect to the highest of +3.3V or +5V available on the circuit board. A
connection of +5V allows +5V or 3.3V input levels. A connection to +3.3V allows
+3.3V input levels only. It is recommended to connect VGG to +5V.
PLLVDD
40
PLL
PLLVDD Connection. Connect to VDD and to GND through 0.1uF
PLLGND
41
PLL
PLLGND Connection. Connect to GND.
PA1 (DTRP)
4
It
Data Terminal Ready. Connect to +3.3V.
PB4 (RTSP)
18
It
Request to Send. Connect to +3.3V.
VDD
25, 26, 57, 68
Digital Power Supply. Connect to +3.3V.
VSS
1, 12, 20, 49
Digital Ground. Connect to digital ground (GND).
6.2.2
Controller Parallel Bus Interface
Signal
Pin No.
I/O
Type
Interface
Controller Bus Interface
DA0/PD0
38
I
Address Line 0. Connect to Controller: DA0 output.
DA1/PD1
39
I
Address Line 1. Connect to Controller: DA1 output.
DA2/PD2
43
I
Address Line 2. Connect to Controller: DA2 output.
DA3/PD3
44
I
Address Line 3. Connect to Controller: DA3 output.
DA4/PD4
45
I
Address Line 4. Connect to Controller: DA4 output.
DD0/PC0
29
IO
Data Line 0. Connect to Controller: DD0 I/O pin.
DD1/PC1
30
IO
Data Line 1. Connect to Controller: DD1 I/O pin.
DD2/PC2
31
IO
Data Line 2. Connect to Controller: DD2 I/O pin.
DD3/PC3
32
IO
Data Line 3. Connect to Controller: DD3 I/O pin.
DD4/PC4
33
IO
Data Line 4. Connect to Controller: DD4 I/O pin.
DD5/PC5
35
IO
Data Line 5. Connect to Controller: DD5 I/O pin.
DD6/PC6
36
IO
Data Line 6. Connect to Controller: DD6 I/O pin.
DD7/PC7
37
IO
Data Line 7. Connect to Controller: DD7 I/O pin.
MCS#/PD5
46
I
Chip Select. MCS# input low selects the Modem DSP. Connect to Controller:
M_CS# output.
DWR#/PD6
47
I
Write Enable. During a write cycle, data from the data bus (DD[7:0]) is copied
into the selected DSP interface memory register, with high and low bus levels
representing one and zero bit states, respectively. Connect to Controller: DWR#
output.
DRD#/PD7
48
I
Read Enable. During a read cycle, data from the selected interface memory
register is gated onto the bus by means of three-state drivers in the Modem
DSP. These drivers force the data lines (DD[7:0]) high for a one bit or low for a
zero bit. When not being read, the three-state drivers assume their high-
impedance (off) state. Connect to Controller: DRD# output.
M_INT/PB5
19
O
Interrupt Request. M_INT is the active low interrupt request. Connect to
Controller: M_INT.
WKRESP
51
Ipu
Wakeup Reset. Active low wake-up. Internal pull-up. Connect to VDD not
Vpcien.
RESETP
62
I
Reset. Active low. Connect to Controller: MRESET# output.
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