参数资料
型号: DSRT-L030-011
厂商: CONEXANT SYSTEMS
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, XMA
文件页数: 47/86页
文件大小: 667K
代理商: DSRT-L030-011
RipTide PCI Audio/Comm Device Family Product Description
1167
ROCKWELL PROPRIETARY INFORMATION
51
7.1.1.7
Latency Timer
The Latency Timer register specifies, in units of PCI Bus clocks, the value of the Latency Timer for this PCI Bus master. This
register has 5 read/write bits (MSBs) plus 3 bits of hardwired zero (LSBs). The Latency Timer Register is loaded into the PCI
Latency counter each time FRAME# is asserted to determine how long the master is allowed to retain control of the PCI Bus.
This register is loaded by system software. The default value for Latency Timer is 00.
7.1.1.8
Header Type
The 8-bit Header Type identifies the layout of the configuration space. Bit 7, when set to a 1, identifies a multifunction device.
The power up default value of 80h therefore represents a multifunction device.
7.1.1.9
Base 0 Register
System software can determine how much address space the device requires by writing all 1’s to the register and then
reading the value back. The device will return 0’s in all don’t care address bits, effectively specifying the address space
required.
The Audio logical device implements a single base address register. Bit 0 is fixed to 1 to indicate an I/O mapped address
space. Bits 5 to 1 are fixed to 0 to indicate that the audio function requires 64 bytes of address space. The power-on default
value for this register is 00000001.
The Modem logical device implements a single base address register. Bits 3 to 0 are fixed to 0 to indicate a memory
mapped address space, that it may be located anywhere in the 32-bit address range, and that it is not pre-fetchable. Bits 15
to 4 are set to 0 to indicate that the modem function requires 64K bytes of address space. The power-on default value for this
register is 00000000.
The Joystick logical device implements a single base address register. Bits 11 to 0 are fixed to 0 to indicate that this is a
memory mapped address space, that it may be located anywhere in the 32-bit address range, that it is not pre-fetchable,
and that the joystick function requires 4 kbytes of address space. The power-on default value for this register is 00000000.
7.1.1.10
Base 1 Address Register
Each function implements a Base 1 Address register which is read only and fixed to the value 0x00000000. This indicates to
the configuration software that only the Base 0 Address register requires allocation.
7.1.1.11
Subsystem Vendor ID
The Subsystem Vendor ID register defaults to 0x127A for all three functions (Rockwell RipTide Subsystem Vendor ID) at
reset and it can then be loaded from the PnP EEPROM. A Subsystem Vendor ID may be obtained from the PCI Special
Interest Group, P.O. Box 14070, Portland, OR 97214, telephone 800-433-5177 or 503-797-4207.
7.1.1.12
Subsystem ID
The Subsystem ID defaults to 0x4300 for function 0, 0x4301 for function 1 and 0x4302 for function 2, at reset and it can then
be loaded from the PnP EEPROM.
7.1.1.13
Cap_Ptr
This register contains the byte offset from the beginning of the configuration header to the first Capability ID defined in the
configuration header. This register defaults to 0x40 at reset.
7.1.1.14
Interrupt Line
This register indicates which of the available system interrupt lines the respective function has been routed to. This register
defaults to 0xFF, which indicates that the function’s interrupt has not been routed to the system. Configuration software will
write the appropriate value to this register.
7.1.1.15
Interrupt Pin
This read-only register indicates which of the PCI interrupt pins (A and B) this function will use. For the Audio and Modem
functions, this register defaults to 0x01. For the Joystick function, this register defaults to 0x00.
7.1.1.16
Min Grant
This read-only register indicates how long a master device would like to retain PCI ownership whenever it is the initiator of a
transaction. It specifies increments of 250 ns. This register defaults to 0x00 for all functions.
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