
RipTide PCI Audio/Comm Device Family Product Description
1167
ROCKWELL PROPRIETARY INFORMATION
61
The I
2S serial interface supports three different formats: I2S -justified (or I2S format), Left-justified (or non-delayed format), and
Right-justified (or EIAJ format). The default state of each port is the disabled state.
9.1.1
I
2S Justified Format
For the I
2S format, Word Select (WS) is low for the left channel, and high for the right channel. Data is valid on the rising edge
of SCK. The MSB is left-justified to an WS transition, with a single SCK period delay. In other words, the MSB of each word
occurs one SCK cycle after the WS transition which marks the beginning of the word.
Slave SCK (in)
Master SCK (out)
WS
SD
MS 14 13
LS
1
MS 14 13
LS
1
Right Channel
Left Channel
1167F11_I2S_JU
Figure 11. I
2S Justified Format
9.1.2
Left Justified Format
For the left-justified format, WS is high for the left channel, and low for the right channel. Data is valid on the rising edge of
SCK. The MSB is left-justified to an WS transition, with no MSB delay. In other words, the MSB of each word occurs during
the same cycle as the WS transition which marks the beginning of the word. In other words, the MSB of each word occurs 16
SCK cycles after the WS transition which marks the beginning of the word.
Slave SCK (in)
Master SCK (out)
WS
SD
MS 14 13
LS
1
MS 14 13
LS
1
Right Channel
Left Channel
1167F12_I2S_LJ
Figure 12. Left-Justified (Non-Delayed) Format
9.1.3
Right Justified Format
For right-justified format, WS is high for the left channel, and low for the right channel. Data is valid on the rising edge of SCK.
The MSB is delayed 16 SCK periods from an WS transition, so that when there are 64 SCK periods per WS period, the LSB
of the data will be right-justified to the next WS transition.
Slave SCK (in)
Master SCK (out)
WS
SD
MS 14 13
LS
1
MS 14 13
LS
1
Right Channel
Left Channel
1167F13_I2S_RJ
Figure 13. Right-Justified (EIAJ) Format