参数资料
型号: PC87393F-VJG
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 外设及接口
英文描述: 100-Pin LPC SuperI/O Devices for Portable Applications
中文描述: MULTIFUNCTION PERIPHERAL, PQFP100
封装: TQFP-100
文件页数: 70/148页
文件大小: 1733K
代理商: PC87393F-VJG
2.0 Device Architecture and Configuration (Continued)
28
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2.2.2
Banked Logical Device Registers Structure
Each functional block is associated with a Logical Device Number (LDN). The configuration registers are grouped into banks,
where each bank holds the standard configuration registers of the corresponding logical device. Table 6 shows the LDN
values of the PC8739x functional blocks. Any value not listed is reserved.
Figure 2 shows the structure of the standard configuration register file. The SuperI/O control and configuration registers are
not banked and are accessed by the Index-Data register pair only, as described above. However, the device control and
device configuration registers are duplicated over 9 banks for 9 logical devices. Therefore, accessing a specific register in
a specific bank is performed by two dimensional indexing, where the LDN register selects the bank (or logical device) and
the Index register selects the register within the bank. Accessing the Data register while the Index register holds a value of
30h or higher physically accesses the logical device configuration registers currently pointed to by the Index register, within
the logical device currently selected by the LDN register.
Figure 2. Structure of Standard Conguration Register File
Table 6. Logical Device Number (LDN) Assignments
Write accesses to unimplemented registers (i.e. accessing the Data register while the Index register points to a non-existing
register), are ignored and read returns 00h on all addresses, except for 74h and 75h (DMA configuration registers) which
returns 04h (indicating no DMA channel is active). The configuration registers are accessible immediately after reset.
LDN
Functional Block
00h
Floppy Disk Controller (FDC)
01h
Parallel Port (PP)
02h
Serial Port 2 with IR (SP2)
03h
Serial Port 1 (SP1)
07h
General-Purpose I/O (GPIO) Ports (PC87392, PC87393 and PC87393F only)
0Ah
WATCHDOG Timer (WDT)
0Bh
Game Port (GMP) (PC87393 and PC87393F only)
0Ch
Musical Instrument Digital Interface (MIDI) Port (PC87393 and PC87393F only)
0Fh
X-Bus Extension (PC87393 and PC87393F only)
07h
20h
30h
60h
75h
FEh
Logical Device Number Register
SuperI/O Configuration Registers
Logical Device Control Register
Standard Logical Device
Special (Vendor-defined)
Configuration Registers
Banks
2Fh
F0h
Bank Select
63h
74h
70h
71h
Configuration Registers
(One per Logical Device)
Logical Device
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