参数资料
型号: PC87393F-VJG
厂商: NATIONAL SEMICONDUCTOR CORP
元件分类: 外设及接口
英文描述: 100-Pin LPC SuperI/O Devices for Portable Applications
中文描述: MULTIFUNCTION PERIPHERAL, PQFP100
封装: TQFP-100
文件页数: 78/148页
文件大小: 1733K
代理商: PC87393F-VJG
2.0 Device Architecture and Configuration (Continued)
35
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The Parallel Port pins function as an FDD interface for either drive 1 or drive 3. See Figure 5 for the internal routing between
the PPM and FDC, and the Parallel Port and FDC pin-sets when PPM mode is active. The FDC output signals are driven
simultaneously both on the normal FDC pins and on the corresponding Parallel Port pins. The FDC inputs are received from
the FDC pins when either drive 0 or drive 2 is selected, and from the corresponding Parallel Port pins when either drive 1 or
drive 3 is selected.
The Parallel Port output signals are isolated from the Parallel Port pins. The Parallel Port input signals, as reflected by the
STR register, assume one of two possible values ([BUSY, PE, SLCT, ACK] = 1001 or 1111), indicating that nothing is con-
nected to the Parallel Port. The default values are controlled by bit 2 of the Parallel Port Configuration register (see Section
2.12.3 for details).
PPM is in power save mode when PPM is active and the PPM power save mode bit is enabled.See Section 2.6.1 for details.
2.6.1
PPM Power Save Mode
PPM power save mode helps avoid the additional power consumption associated with driving two sets of FDD outputs by
limiting the activity to the selected drive only. PPM power save mode is enabled by bit 2 of the SIOCF5 register, and is in
effect only when the PPM is active. Assuming that the internal FDD (on the normal FDC pins) is drive 0, while the external
FDD (on the Parallel Port pins) is drive 1, the outputs of the non-selected drive do not toggle, but rather are frozen at their
inactive levels. Table 14 shows the behavior of the FDC outputs on both the FDC and Parallel Port pins when the PPM is
active and PPM power save mode is enabled.
Table 14. FDC Output Status in PPM Power Save Mode
DR0
Signal
DR1
Signal
FDC Outputs
FDC Pins
Parallel Port Pins
0
1
Functional
Frozen at inactive levels
1
0
Frozen at inactive levels
Functional
1
Functional
FDC
Parallel
FDC Inputs
1
0
Figure 5. PPM Routing
FDC Pins
Parallel Port Pins
1
0
Parallel Port Inputs
FDC Outputs
Outputs
1
0
PPM Active and
Drive 1 or 3 Selected
PPM in Power Save Mode
and Drive 1 Selected
Parallel Port Input Values
FDC Outputs
FDC Inputs
Default “Non-Connect”
Outputs Frozen
at Inactive Levels
Outputs Frozen
at Inactive Levels
PPM in Power Save Mode
and Drive 0 Selected
PPM Power Save
Port
Parallel Port
PPM Active
and bit 7 of SIOCF5 is ’0’ (PNF=0)
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