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| 型号： | RN80532KC0412M |
| 厂商： | INTEL CORP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2000 MHz, MICROPROCESSOR, CPGA603 |
| 封装： | Interposer, Micro, PGA-603 |
| 文件页数： | 106/132页 |
| 文件大小： | 2316K |
| 代理商： | RN80532KC0412M |
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Intel Xeon Processor MP with up to 2MB L3 Cache
6-1
Features
Features
6
6.1
Power-On Configuration Options
Intel Xeon processor MP on the 0.13 micron process processor members have several
configuration options that are determined by the state of specific processor pins at the active-to-
inactive transition of the processor RESET# signal. These configuration options cannot be changed
except by another reset. Both power on and software induced resets reconfigure the processor(s).
NOTES:
1. Asserting this signal during active-to-inactive edge of RESET# will selects the corresponding option.
6.2
Clock Control and Low Power States
The Intel Xeon processor MP on the 0.13 micron process processor allows the use of AutoHALT,
Stop-Grant and Sleep states to reduce power consumption by stopping the clock to internal sections
of the processor, depending on each particular state. See Figure 41 for a visual representation of the
processor low power states.
Due to the inability of processors to recognize bus transactions during the Sleep state,
multiprocessor Intel Xeon processor MP on the 0.13 micron process processor based systems are
not allowed to simultaneously have one processor in Sleep state and the other processors in Normal
or Stop-Grant state.
6.2.1
Normal State—State 1
This is the normal operating state for the processor.
6.2.2
AutoHALT Powerdown State—State 2
AutoHALT is a low power state entered when the processor executes the HALT instruction. The
processor will transition to the Normal state upon the occurrence of SMI#, BINIT#, INIT#,
LINT[1:0] (NMI, INTR), or an interrupt delivered over the system bus. RESET# will cause the
processor to immediately initialize itself.
Table 34. Power-On Configuration Option Pins
Configuration Option
Pin
Notes1
Output tri state
SMI#
Execute BIST (Built-In Self Test)
INIT#
In Order Queue de-pipelining (set IOQ depth to 1)
A7#
Disable MCERR# observation
A9#
Disable BINIT# observation
A10#
APIC cluster ID (0-3)
A[12:11]#
2
Disable bus parking
A15#
Disable Hyper-Threading Technology
A31#
Symmetric agent arbitration ID
BR[3:0]#
3
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相关代理商/技术参数 |
参数描述 |
|---|---|
| RN80532KC041512 | 制造商:Intel 功能描述:TRAY XEON 2.0GHZ 400MZH FSB - Trays 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| RN80532KC041512 SL5Z9 | 制造商:Intel 功能描述:MPU XEON 0.13UM 2GHZ 603-PIN UFCBGA - Trays |
| RN80532KC041512 SL6EM | 制造商:Intel 功能描述:MPU XEON 0.13UM 2GHZ 603-PIN UFCBGA - Trays |
| RN80532KC041512S L5Z9 | 制造商:Intel 功能描述:MPU Xeon? Processor 0.13um 2GHz 603-Pin uFCBGA |
| RN80532KC041512S L6W6 | 制造商:Intel 功能描述:MPU Xeon? Processor 0.13um 2GHz 603-Pin uFCBGA |
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