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参数资料
| 型号： | W9725G8JB-25I |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | DDR DRAM, PBGA84 |
| 封装： | 8 X 12.50 MM, ROHS COMPLIANT, WBGA-84 |
| 文件页数： | 67/86页 |
| 文件大小： | 1462K |
| 代理商： | W9725G8JB-25I |
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W9725G8JB
Publication Release Date: Oct. 12, 2010
- 7 -
Revision A01
5.
BALL DESCRIPTION
BALL NUMBER
SYMBOL
FUNCTION
DESCRIPTION
H8,H3,H7,J2,J8,J3,
J7,K2,K8,K3,H2,K7,
L2
A0
A12
Address
Provide the row address for active commands, and the column
address and Auto-precharge bit for Read/Write commands to select
one location out of the memory array in the respective bank.
Row address: A0A12.
Column address: A0A9. (A10 is used for Auto-precharge)
G2,G3
BA0
BA1
Bank Select
BA0
BA1 define to which bank an Active, Read, Write or Precharge
command is being applied. Bank address also determines if the
mode register or one of the extended mode registers is to be
accessed during a MRS or EMRS command cycle.
C8,C2,D7,D3,D1,D9,
B1,B9
DQ0
DQ7
Data Input
/ Output
Bi-directional data bus.
F9
ODT
On Die Termination
Control
ODT (registered HIGH) enables termination resistance internal to the
DDR2 SDRAM.
B7,A8
DQS, DQS
Data Strobe /
Differential Read
Data Strobe
Output with read data, input with write data for source synchronous
operation. Edge-aligned with read data, center-aligned with write
data. DQS is only used when differential data strobe mode is
enabled via the control bit at EMR (1) [A10] = 0.
G8
CS
Chip Select
All
commands
are
masked
when
CS
is
registered
HIGH
. CS provides for external Rank selection on systems with
multiple Ranks. CS is considered part of the command code.
F7,G7,F3
RAS , CAS ,
WE
Command Inputs
RAS , CAS and WE (along with CS ) define the command being
entered.
B3
DM/RDQS
Input Data Mask/
Read Data Strobe
DM is an input mask signal for write data. Input data is masked when
DM is sampled HIGH coincident with that input data during a Write
access. DM is sampled on both edges of DQS. Although DM is input
only, the DM loading matches the DQ and DQS loading. When
RDQS is enabled, RDQS is output with read data only and is ignored
during write data. RDQS is enabled by EMR (1) [A11] = 1. If RDQS is
enabled, the DM function is disabled.
A2
NU/ RDQS
Not Use/Differential
Read Data Strobe
RDQS is only used when RDQS is enabled and differential data
strobe mode is enabled. If differential data strobe mode is disabled
via the control bit at EMR (1) [A10] = 1, then ball A2 and A8 are not
used.
E8,F8
CLK, CLK
Differential Clock
Inputs
CLK and CLK are differential clock inputs. All address and control
input signals are sampled on the crossing of the positive edge of CLK
and negative edge of CLK . Output (read) data is referenced to the
crossings of CLK and CLK (both directions of crossing).
F2
CKE
Clock Enable
CKE (registered HIGH) activates and CKE (registered LOW)
deactivates clocking circuitry on the DDR2 SDRAM.
E2
VREF
Reference Voltage
VREF is reference voltage for inputs.
A1,E9,H9,L1
VDD
Power Supply
Power Supply: 1.8V
±0.1V.
A3,E3,J1,K9
VSS
Ground
Ground.
A9,C1,C3,C7,C9
VDDQ
DQ Power Supply
DQ Power Supply: 1.8V
±0.1V.
A7,B2,B8,D2,D8
VSSQ
DQ Ground
DQ Ground. Isolated on the device for improved noise immunity.
G1,L3,L7,L8
NC
No Connection
No connection.
E1
VDDL
DLL Power Supply
DLL Power Supply: 1.8V
±0.1V.
E7
VSSDL
DLL Ground
DLL Ground.
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| W972GG8JB-18 | 256M X 8 DDR DRAM, 0.35 ns, PBGA60 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9725G8JB25ITR | 制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X8, IND TEMP |
| W9725G8JB25TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X8 |
| W9725G8KB-18 | 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W9725G8KB-25 | 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W9725G8KB-25 TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR2-800, X8 |
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