XRT79L71
PRELIMINARY
175
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
STEP 2 - Configure the Transmit Drive Monitoring block into the Internal Mode.
The user can accomplish this step by setting Bit 5 (Internal Transmit Drive Monitor) to "1" as depicted below.
NOTE: To implement Transmit Output Drive Monitoring via Internal Means, then there is NO need for the user to implement
the external connections via the MTIP and TTIP and MRING and TRING pins. In this case, the Transmit Drive
Monitor circuit will be monitoring (e.g., checking the TTIP/TRING signals for bipolar activity) by direction checking
the pads of the TTIP/TRING outputs themselves.
Once the user has implement this (above-mentioned) step, then the Transmit Drive Monitor block will proceed
to internally check the TTIP/TRING lines for bipolar activity. As long as the Transmit Drive Monitor block
detects a regular stream of bipolar pulses, then it will negate the Transmit DMO Condition by continuing to set
Bit 0 (Transmit DMO Condition), within the LIU Alarm Status Register, to "0" as depicted below.
NOTE: For most applications, the Transmit DMO Condition bit-field being set to "0" is a normal and a desirable condition.
FIGURE 79. A SCHEMATIC DESIGN, DEPICTING THE REQUIRED CONNECTIONS FOR INTERNAL TRANSMIT DRIVE MON-
ITORING
LIU Transmit Control Register (Address = 0x1304)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Internal
Transmit
Drive Moni-
tor
Unused
TAOS
Unused
TxLEV
R/O
R/W
R/O
R/W
R/O
R/W
0
1
0
1
0
LIU Alarm Status Register (Address = 0x1303)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Unused
Digital LOS
Defect
Declared
Analog LOS
Defect
Declared
FL (FIFO
Limit) Alarm
Declared
Receive LOL
Defect
Declared
Receive LOS
Defect
Declared -
Receive
DS3/E3 LIU
Block
Transmit
DMO
Condition
R/O
0
R10
31.6
R12
100
J4
BNC
1
2
T4
T3001
1
6
3
4
R9 31.6
R11
100
U4
XRT79L71
T11
T10
P10
P11
TTIP
TRING
MTIP
MRING