![](http://datasheet.mmic.net.cn/Exar-Corporation/XRT79L71IB-F_datasheet_100145/XRT79L71IB-F_281.png)
PRELIMINARY
XRT79L71
266
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
a. To (via software control) set it to any value.
b. To configure the "N" bit to transport the LAPD/PMDL Message
Information on how to control and monitor the state of the "N" bit (within a given E3 data-stream) can be found
respectively.
Information on how to configure the XRT79L71 to transport LAPD/PMDL Messages via the "N" bit, within a
5.2
THE TRANSMIT DIRECTION - E3, ITU-T G.751 CLEAR-CHANNEL FRAMER APPLICATIONS
Now that the basics of the E3, ITU-T G.751 frame structure have been discussed, the next several sections
present an in-depth functional description of all of the blocks that are operating in the Transmit Direction, within
the XRT79L71, when configured to operate in the Clear-Channel E3 Framer Mode. Figure 122 presents a
functional block diagram of the Transmit Direction circuitry within the XRT79L71.
Figure 122 indicates that the Transmit Direction circuitry consists of the following functional blocks.
The Transmit Payload Data Input Interface block
The Transmit Overhead Data Input Interface block
The Transmit LAPD Controller block
The Transmit E3 Framer block
FIGURE 122. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY WHEN-
EVER THE
XRT79L71 HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.751 CLEAR-CHANNEL FRAMER
MODE
Transmit
Payload Data
Input
Interface
Block
Transmit
Payload Data
Input
Interface
Block
Transmit
DS3/E3
Framer
Block
Transmit
DS3/E3
Framer
Block
Tranmit
DS3/E3
LIU Block
Tranmit
DS3/E3
LIU Block
TxSer
TxNib[3:0]
TxInClk
TRING
TTIP
Transmit
Overhead Data
Input Interface
Block
Transmit
Overhead Data
Input Interface
Block
TxOHClk
TxOHIns
TxOHInd
TxOH
TxOHEnable
TxOHFrame
TxNibClk
TxFrame
Tx LAPD
Controller
Block
Tx LAPD
Controller
Block
From Microprocessor
Interface Block
Tx LAPD
Buffer
(90 Bytes)
Tx LAPD
Buffer
(90 Bytes)