XRT79L71
PRELIMINARY
303
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
REV. P2.0.0
TASK # 2 - Continue to sample both the TxOHEnable and TxOHFrame output pins with each falling edge of
TxInClk. The System-Side Terminal Equipment should increment an internal counter each time it samples the
TxOHEnable output pin "High".
The System-Side Terminal Equipment should execute this task until the
counter has reach the value "10".
Once this counter has reached the value "10" then the System-Side
Terminal Equipment should move on to TASK # 3.
TASK # 3 - The System-Side Terminal Equipment MUST execute all of the following two sub-tasks
simultaneously.
TASK # 3a - The System-Side Terminal Equipment must assert the TxOHIns input pin by setting it "High".
TASK # 3b - The System-Side Terminal Equipment must set the TxOH input pin to "1".
After the System-Side Terminal Equipment has executed these two sub-tasks, it must now move on to TASK #
4.
TASK # 4 - The System-Side Terminal Equipment must continue to sample the TxOHEnable output pin (from
the XRT79L71).
Whenever the System-Side Terminal Equipment samples the TxOHEnable "High" (once
again) then it must negate the TxOHIns input pin (e.g., by setting it to "0"). Afterwards, the System-Side
Terminal Equipment should then reset the internal TxOHEnable counter to "0", and return to TASK # 1.
5.2.3
TRANSMIT LAPD CONTROLLER BLOCK
The Transmit LAPD Controller block is the third functional block (within the Transmit Direction) of the
XRT79L71 that we will discuss for E3, ITU-T G.751 Clear-Channel Framer Applications. Figure 143 presents
an illustration of the Transmit Direction circuitry whenever the XRT79L71 has been configured to operate in the
E3, ITU-T G.751 Clear-Channel Framer Mode, with the Transmit LAPD Controller block highlighted.