
PRELIMINARY
XRT79L71
432
REV. P2.0.0
1-CHANNEL DS3/E3 CLEAR-CHANNEL FRAMERLIU COMBO - CC/HDLC ARCHITECTURE
Figure 204 indicates that the Transmit Direction circuitry consists of the following functional blocks.
The Transmit Payload Data Input Interface block
The Transmit Overhead Data Input Interface block
The Transmit LAPD Controller block
The Transmit Trail-Trace Message Controller block
The Transmit SSM Controller block
The Transmit E3 Framer Block
The Transmit E3 LIU Block
6.2.1
TRANSMIT PAYLOAD DATA INPUT INTERFACE BLOCK
The Transmit Payload Data Input Interface block is the very first functional block (within the Transmit Direction)
of the XRT79L71 that we will discuss for E3, ITU-T G.832 Clear-Channel Framer Applications. Figure 205 presents an illustration of the "Transmit Direction" circuitry whenever the XRT79L71 has been configured to
operate in the E3, Clear-Channel Framer Mode, with the "Transmit Payload Data Input Interface" block
highlighted.
FIGURE 204. ILLUSTRATION OF THE FUNCTIONAL BLOCK DIAGRAM OF THE TRANSMIT DIRECTION CIRCUITRY WHEN-
EVER THE
XRT79L71 HAS BEEN CONFIGURED TO OPERATE IN THE E3, ITU-T G.832 CLEAR-CHANNEL FRAMER
MODE
Transmit
Payload Data
Input
Interface
Block
Transmit
Payload Data
Input
Interface
Block
Transmit
DS3/E3
Framer
Block
Transmit
DS3/E3
Framer
Block
Transmit
DS3/E3
LIU Block
Transmit
DS3/E3
LIU Block
TxSer
TxNib[3:0]
TxInClk
TRING
TTIP
Transmit
Overhead Data
Input Interface
Block
Transmit
Overhead Data
Input Interface
Block
TxOHClk
TxOHIns
TxOHInd
TxOH
TxOHEnable
TxOHFrame
TxNibClk
TxFrame
Tx LAPD
Controller
Block
Tx LAPD
Controller
Block
From Microprocessor
Interface Block
Tx LAPD
Buffer
(90 Bytes)
Tx LAPD
Buffer
(90 Bytes)
Tx TTM
Controller
Block
Tx TTM
Controller
Block
Tx SSM
Controller
Block
Tx SSM
Controller
Block