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参数资料
| 型号： | MT42L64M32D1KL-25 IT:A |
| 厂商： | Micron Technology Inc |
| 文件页数： | 109/164页 |
| 文件大小： | 0K |
| 描述： | IC DDR2 SDRAM 2GBIT 168FBGA |
| 标准包装： | 1,000 |
| 格式 - 存储器： | RAM |
| 存储器类型： | 移动 LPDDR2 SDRAM |
| 存储容量： | 2G（64M x 32） |
| 速度： | 400MHz |
| 接口： | 并联 |
| 电源电压： | 1.14 V ~ 1.3 V |
| 工作温度： | -25°C ~ 85°C |
| 封装/外壳： | 168-WFBGA |
| 供应商设备封装： | 168-FBGA（12x12） |
| 包装： | 散装 |
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2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Truth Tables
READ with AP enabled: Starts with registration of a READ command with auto pre-
charge enabled and ends when t RP is met. After t RP is met, the bank is in the idle state.
WRITE with AP enabled: Starts with registration of a WRITE command with auto pre-
charge enabled and ends when t RP is met. After t RP is met, the bank is in the idle state.
5. The states listed below must not be interrupted by any executable command. NOP com-
mands must be applied to each rising clock edge during these states.
Refresh (per bank): Starts with registration of a REFRESH (per bank) command and ends
when t RFCpb is met. After t RFCpb is met, the bank is in the idle state.
Refresh (all banks): Starts with registration of a REFRESH (all banks) command and ends
when t RFCab is met. After t RFCab is met, the device is in the all banks idle state.
Idle MR reading: Starts with registration of the MRR command and ends when t MRR is
met. After t MRR is met, the device is in the all banks idle state.
Resetting MR reading: Starts with registration of the MRR command and ends when
t MRR is met. After t MRR is met, the device is in the all banks idle state.
Active MR reading: Starts with registration of the MRR command and ends when t MRR
is met. After t MRR is met, the bank is in the active state.
MR writing: Starts with registration of the MRW command and ends when t MRW is met.
After t MRW is met, the device is in the all banks idle state.
Precharging all: Starts with registration of a PRECHARGE ALL command and ends when
t RP is met. After t RP is met, the device is in the all banks idle state.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
Bank-specific; requires that the bank is idle and no bursts are in progress.
Not bank-specific; requires that all banks are idle and no bursts are in progress.
Not bank-specific.
This command may or may not be bank specific. If all banks are being precharged, they
must be in a valid state for precharging.
If a PRECHARGE command is issued to a bank in the idle state, t RP still applies.
A command other than NOP should not be issued to the same bank while a burst READ
or burst WRITE with auto precharge is enabled.
The new READ or WRITE command could be auto precharge enabled or auto precharge
disabled.
A WRITE command can be issued after the completion of the READ burst; otherwise, a
BST must be issued to end the READ prior to asserting a WRITE command.
Not bank-specific. The BST command affects the most recent READ/WRITE burst started
by the most recent READ/WRITE command, regardless of bank.
A READ command can be issued after completion of the WRITE burst; otherwise, a BST
must be used to end the WRITE prior to asserting another READ command.
Table 52: Current State Bank n to Command to Bank m Truth Table
Notes 1–6 apply to all parameters and conditions
Current State
of Bank n
Any
Idle
Command to Bank m
NOP
Any
Operation
Continue previous operation
Any command supported to bank m
Next State for Bank m
Current state of bank m
–
Notes
7
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
109
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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