![](http://datasheet.mmic.net.cn/390000/MT48V4M32LFFC_datasheet_16823585/MT48V4M32LFFC_45.png)
45
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x16, x32
MOBILE SDRAM
ADVANCE
READ – WITHOUT AUTO PRECHARGE
1
ALL BANKS
tCH
tCL
tCK
tAC
tLZ
tRP
tRAS
tRC
tRCD
CAS Latency
tOH
D
OUT
m
tCMH
tCMS
tAH
tAS
tAH
tAS
tAH
tAS
ROW
ROW
BANK
BANK(S)
BANK
ROW
ROW
BANK
tHZ
tOH
D
OUT
m
+3
tAC
tOH
tAC
tOH
tAC
D
OUT
m
+2
D
OUT
m
+1
tCMH
tCMS
PRECHARGE
NOP
NOP
NOP
ACTIVE
NOP
READ
NOP
ACTIVE
DISABLE AUTO PRECHARGE
SINGLE BANKS
DON’T CARE
UNDEFINED
COLUMN
m
2
tCKH
tCKS
T0
T1
T2
T3
T4
T5
T6
T7
T8
DQMU, DQML
CKE
CLK
A0-A9, A11
DQ
BA0, BA1
A10
COMMAND
TIMING PARAMETERS
-8
-10
SYMBOL*
t
AC (3)
t
AC (2)
t
AC (1)
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CK (1)
t
CKH
t
CKS
MIN
MAX
7
8
19
MIN
MAX
7
8
22
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2.5
3
3
8
10
20
1
2.5
2.5
3
3
10
12
25
1
2.5
t
CMH
t
CMS
t
HZ (3)
t
HZ (2)
t
HZ (1)
t
LZ
t
OH
t
RAS
t
RC
t
RCD
t
RP
1
1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2.5
2.5
7
8
7
8
19
22
1
1
2.5
48
80
20
20
2.5
50
100
20
20
120,000
120,000
*CAS latency indicated in parentheses.
NOTE:
1. For this example, the burst length = 4, the CAS latency = 2, and the READ burst is followed by a “manual”
PRECHARGE.
2. x16: A9 and A11 = “Don’t Care”
x32: A8, A9,and A11 = “Don’t Care”
-8
-10
SYMBOL*
MIN
MAX
MIN
MAX
UNITS