![](http://datasheet.mmic.net.cn/390000/MT48V4M32LFFC_datasheet_16823585/MT48V4M32LFFC_49.png)
49
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x16, x32
MOBILE SDRAM
ADVANCE
ALTERNATING BANK READ ACCESSES
1
ENABLE AUTO PRECHARGE
tCH
tCL
tCK
tAC
tLZ
DQMU, DQML
CLK
A0-A9, A11
DQ
BA0, BA1
A10
tOH
D
OUT
m
tCMH
tCMS
tAH
tAS
tAH
tAS
tAH
tAS
ROW
ROW
ROW
ROW
DON’T CARE
UNDEFINED
tOH
D
OUT
m
+ 3
tAC
tOH
tAC
tOH
tAC
D
OUT
m
+ 2
D
OUT
m
+ 1
COMMAND
tCMH
tCMS
NOP
NOP
ACTIVE
NOP
READ
NOP
ACTIVE
tOH
D
OUT
b
tAC
tAC
READ
ENABLE AUTO PRECHARGE
ROW
ACTIVE
ROW
BANK 0
BANK 0
BANK 3
BANK 3
BANK 0
CKE
tCKH
tCKS
COLUMN
m
2
COLUMN
b
2
T0
T1
T2
T4
T3
T5
T6
T7
T8
tRP - BANK 0
tRAS - BANK 0
t
RC - BANK 0
tRCD - BANK 0
tRCD - BANK 0
CAS Latency - BANK 0
tRCD - BANK 3
CAS Latency - BANK 3
t
RRD
NOTE:
1. For this example, the burst length = 4, and the CAS latency = 2.
2. x16: A9 and A11 = “Don’t Care”
x32: A8, A9,and A11 = “Don’t Care”
*CAS latency indicated in parentheses.
-8
-10
SYMBOL*
t
CKS
t
CMH
t
CMS
t
LZ
t
OH
t
RAS
t
RC
t
RCD
t
RP
t
RRD
MIN
2.5
1
2.5
1
2.5
48
80
20
20
20
MAX
MIN
2.5
1
2.5
1
2.5
50
100
20
20
20
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
120,000
120,000
TIMING PARAMETERS
-8
-10
SYMBOL*
t
AC (3)
t
AC (2)
t
AC (1)
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CK (1)
t
CKH
MIN
MAX
7
8
19
MIN
MAX
7
8
22
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1
1
2.5
3
3
8
10
20
1
2.5
3
3
10
12
25
1