![](http://datasheet.mmic.net.cn/390000/MT48V4M32LFFC_datasheet_16823585/MT48V4M32LFFC_56.png)
56
128Mb: x16, x32 Mobile SDRAM
MobileY95W_3V_F.p65 – Rev. F; Pub. 9/02
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2002, Micron Technology, Inc.
128Mb: x16, x32
MOBILE SDRAM
ADVANCE
ALTERNATING BANK WRITE ACCESSES
1
DON’T CARE
tCH
tCL
tCK
CLK
DQ
D
IN
m
tDH
tDS
D
IN
m
+ 1
D
IN
m
+ 2
D
IN
m
+ 3
COMMAND
tCMH
tCMS
NOP
NOP
ACTIVE
NOP
WRITE
NOP
NOP
ACTIVE
tDH
tDS
tDH
tDS
tDH
tDS
ACTIVE
WRITE
D
IN
b
tDH
tDS
D
IN
b
+ 1
D
IN
b
+ 3
tDH
tDS
tDH
tDS
ENABLE AUTO PRECHARGE
DQMU, DQML
A0-A9, A11
BA0, BA1
A10
tCMH
tCMS
tAH
tAS
tAH
tAS
tAH
tAS
ROW
ROW
ROW
ROW
ENABLE AUTO PRECHARGE
ROW
ROW
BANK 0
BANK 0
BANK 1
BANK 0
BANK 1
CKE
tCKH
tCKS
D
IN
b
+ 2
tDH
tDS
COLUMN
b
2
COLUMN
m
2
tRP - BANK 0
tRAS - BANK 0
t
RC - BANK 0
tRCD - BANK 0
t
t
RCD - BANK 0
tWR - BANK 0
WR - BANK 1
tRCD - BANK 1
t
RRD
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
NOTE:
1. For this example, the burst length = 4.
2. x16: A9 and A11 = “Don’t Care”
x32: A8, A9,and A11 = “Don’t Care”
*CAS latency indicated in parentheses.
-8
-10
SYMBOL*
t
CMS
t
DH
t
DS
t
RAS
t
RC
t
RCD
t
RP
t
RRD
t
WR
MIN
2.5
1
2.5
48
80
20
20
20
1 CLK +
7ns
MAX
MIN
2.5
1
2.5
50
100
20
20
20
1 CLK +
5ns
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
–
120,000
120,000
TIMING PARAMETERS
-8
-10
SYMBOL*
t
AH
t
AS
t
CH
t
CL
t
CK (3)
t
CK (2)
t
CK (1)
t
CKH
t
CKS
t
CMH
MIN
1
2.5
3
3
8
10
20
1
2.5
1
MAX
MIN
1
2.5
3
3
10
12
25
1
2.5
1
MAX
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns