- 您现在的位置：买卖IC网 > PDF目录365968 > TSB12LV26PZ (Texas Instruments, Inc.) OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER PDF资料下载
参数资料
| 型号： | TSB12LV26PZ |
| 厂商： | Texas Instruments, Inc. |
| 英文描述： | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| 中文描述： | OHCI的山猫基于PCI的1394主控制器 |
| 文件页数： | 41/106页 |
| 文件大小： | 605K |
| 代理商： | TSB12LV26PZ |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页当前第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页
3
–
4
3.3
The micro interface can be configured to operate in one of the following modes: handshake, fixed-timing,
or ColdFire mode. Burst transfers are only supported in the latter two modes.
3.3.1
Microcontroller Handshake Mode
Byte handshake read and word handshake read are shown in Figure 3
–
3 and Figure 3
–
4, respectively.
Microcontroller Interface Read/Write Timing
The MCS, MCA handshake timing sequence for a read transaction can be summarized as follows:
1.
The host takes MCS low to signal the start of access. When the rising edge of BCLK samples
MCS low and MWR high, the MD[0:15] lines are enabled and driven with the read value. For an
8-bit data bus, MD[0:7] lines are not used.
2.
Following the next rising edge of BCLK, the TSB12LV32 takes MCA low to signal that the
requested operation is complete. This is ensured to take place after two BCLK cycles. MCA
remains low with the MD lines containing valid read data until the micro interface releases MCS
(high state)
3.
The host takes MCS high to signal the end of the process.
4.
The TSB12LV32 takes MCA high to acknowledge the end of the access. This 3-states the MD
lines.
Another read or write transaction can begin after the next rising edge of BCLK. Note that data size is
determined by the MCMODE/SIZ1 and M8BIT/SIZ0 signals. The ColdFire signal is only asserted high when
the micro interface is operating in ColdFire mode.
BCLK
COLDFIRE
M8BIT/SIZ0
MCMODE/SIZ1
MWR
MCS
MCA
MCADR[0:6]
MD[0:7]
MD[8:15]
A1
D1
D2
A2
Figure 3
–
3. Byte Handshake Read
Figure 3
–
4 shows a word handshake read transaction. In this case, all 16 bits of the MD lines are used. Note
that MD[0] contains the MSB and MD[15] contains the LSB. As in the byte read case, another read or write
transaction can begin after the next rising edge of BCLK.
相关PDF资料 |
PDF描述 |
|---|---|
| TSB14AA1 | FPGA (Field-Programmable Gate Array) |
| TSB14AA1I | FPGA (Field-Programmable Gate Array) |
| TSB14AA1T | FPGA (Field-Programmable Gate Array) |
| TSB14C01MHV | IC APEX 20KE FPGA 160K 484-FBGA |
| TSB14C01HV | 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TSB12LV26PZT | 功能描述:1394 接口集成电路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
| TSB12LV26PZTG4 | 功能描述:1394 接口集成电路 OHCI-Lynx PCI-Based IEEE1394 Host Cntrlr RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
| TSB12LV26TPZEP | 功能描述:1394 接口集成电路 Mil Enh OHCI-Lynx IEEE 1394 Host Cntlr RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray |
| TSB12LV31 | 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER |
| TSB12LV31PZ | 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394-1995 General-Purpose Link-Layer Controller |
发布紧急采购，3分钟左右您将得到回复。