参数资料
型号: TSB12LV26PZ
厂商: Texas Instruments, Inc.
英文描述: OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
中文描述: OHCI的山猫基于PCI的1394主控制器
文件页数: 79/106页
文件大小: 605K
代理商: TSB12LV26PZ
7
1
7 TSB12LV32 Data Formats
The data formats for transmission and reception of data are shown in the following sections. The transmit
format describes the expected organization of data presented to the TSB12LV32 at the host-bus interface.
The receive formats describe the data format that the TSB12LV32 presents to the host-bus interface.
7.1
Asynchronous transmit refers to the use of the asynchronous-transmit FIFO (ATF) interface. The
general-receive FIFO (GRF) is shared by asynchronous data and isochronous data. There are two basic
formats for data to be transmitted and received. The first is for quadlet packets, and the second is for block
packets. For transmits, the FIFO address indicates the beginning, middle, and end of a packet. For receives,
the data length, which is found in the header of the packet, determines the number of bytes in a block packet.
Asynchronous Transmit (Host Bus to TSB12LV32)
7.1.1
The quadlet-transmit format is shown in Figure 7
1 and 7
2, are described in Table 7
1. The first quadlet
contains packet control information. The second and third quadlets contain the 64-bit, quadlet-aligned
address. The fourth quadlet is data used only for write requests and read responses. For read requests and
write responses, the quadlet data field is omitted.
Quadlet Transmit
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
17
16
20 21
31
30
29
28
27
26
25
24
23
22
prioity
tCode
rt
tLabel
spd
desinationOffsetHigh
destinationID
desinationOffsetLow
quadlet data
Figure 7
1. Quadlet-Transmit Format (Write Request)
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
17
16
20 21
31
30
29
28
27
26
25
24
23
22
prioity
tCode
rt
tLabel
spd
rCode
destinationID
quadlet data
Figure 7
2. Quadlet-Transmit Format (Read Response)
相关PDF资料
PDF描述
TSB14AA1 FPGA (Field-Programmable Gate Array)
TSB14AA1I FPGA (Field-Programmable Gate Array)
TSB14AA1T FPGA (Field-Programmable Gate Array)
TSB14C01MHV IC APEX 20KE FPGA 160K 484-FBGA
TSB14C01HV 5-V IEEE 1394-1995 BACKPLANE TRANSCEIVER/ARBITER
相关代理商/技术参数
参数描述
TSB12LV26PZT 功能描述:1394 接口集成电路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray
TSB12LV26PZTG4 功能描述:1394 接口集成电路 OHCI-Lynx PCI-Based IEEE1394 Host Cntrlr RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray
TSB12LV26TPZEP 功能描述:1394 接口集成电路 Mil Enh OHCI-Lynx IEEE 1394 Host Cntlr RoHS:否 制造商:Texas Instruments 类型:Link Layer Controller 工作电源电压: 封装 / 箱体:LQFP 封装:Tray
TSB12LV31 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
TSB12LV31PZ 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394-1995 General-Purpose Link-Layer Controller