参数资料
型号: TSB12LV26PZ
厂商: Texas Instruments, Inc.
英文描述: OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER
中文描述: OHCI的山猫基于PCI的1394主控制器
文件页数: 45/106页
文件大小: 605K
代理商: TSB12LV26PZ
3
8
BCLK
COLDFIRE
M8BIT/SIZ0
MCMODE/SIZ1
MWR
MCS
MCA
MA[0:6]
MD[0:7]
MD[8:15]
A1
A2
D2
D4
D6
D8
D10
D1
D3
D5
D7
D9
Figure 3
8. Word Fixed-Timing Read
Byte fixed timing write and word fixed timing write are shown in Figure 3
9 and Figure 3
10.
The first data transfer takes one extra wait cycle. All subsequent data transfers take only one BCLK cycle.
For an 8-bit data bus, MD[0:7] is not used (don
t care) and is driven with zeros. If the write transaction is
accessing the CFR register, it may not cross any register boundary. First write data for each ATF quadlet
must start at byte0. Write accesses to the ATF must be quadlet aligned. The micro interface will wait for all
bytes of each quadlet to be available before creating a write request to the ATF. If a transfer error condition
occurs, TEA will be asserted low for one BCLK cycle. An error condition can occur if the MCMODE/SIZ1
or M8BIT/SIZ0 lines transition during the access cycle.
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TSB12LV31 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394-1995 TRIPLE-CABLE TRANSCEIVER/ARBITER
TSB12LV31PZ 制造商:TI 制造商全称:Texas Instruments 功能描述:IEEE 1394-1995 General-Purpose Link-Layer Controller