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| 型号： | HSP50216KIZ |
| 厂商： | Intersil |
| 文件页数： | 33/58页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER DGTL 4CH 196BGA |
| 标准包装： | 1 |
| 功能： | 降频器 |
| RF 型： | W-CDMA |
| 封装/外壳： | 196-LFBGA |
| 包装： | 托盘 |
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HSP50216
TABLE 3. CHANNEL INPUT SELECT/FORMAT REGISTER (IWA = *000h) (Continued)
P(15:0)
2
1
0
P(31:0)
31:16
15:0
P(15:0)
15:0
P(15:0)
15:6
5:1
0
P(31:0)
31:19
18:14
FUNCTION
Enable COF/COFSYNC inputs. When set, this bit enables two bits from the D(15:0) input data bus to be used as a carrier offset
frequency input.
Enable SOF/SOFSYNC inputs. When set, this bit enables two bits from the D(15:0) input data bus to be used as a resampler offset
frequency input.
Enable PN. When set, A PN code, weighted by the gain in location *001, is added to the input samples at the output of the mixer.
TABLE 4. PN GAIN REGISTER (IWA = *001h)
FUNCTION
Reserved, set to all 0’s.
PN generator gain register. This input is provided to reduce the sensitivity of the receiver. A PN code, weighted by the value in this
location, is added to the data at the output of the mixer. Adding noise has the effect of increasing the receiver noise figure. One reason
to do this would be to decrease the basestation cell size in small steps. This method is very accurate and repeatable and can be
done on a FDM channel by channel basis. It does, however, reduce the overall dynamic range. An alternate way is to add attenuation
at the RF and adjust the whole range upward. This does not reduce the overall range but only shift it, with the shift being done on all
channels simultaneously.
TABLE 5. CIC DECIMATION FACTOR REGISTER (IWA = *002h)
FUNCTION
Load with the desired CIC decimation factor minus 1.
TABLE 6. CIC DESTINATION FIR AND OUTPUT ENABLE/DISABLE REGISTER (IWA = *003h)
FUNCTION
Set to zero.
CIC output destination (FIR # in FIR processor). Usually set to 00001.
CIC output enable. Active high. When low, the data writes from the CIC to the filter compute engine are inhibited.
TABLE 7. CARRIER NCO/CIC CONTROL REGISTER (IWA = *004h)
FUNCTION
Reserved, set to zero.
CIC barrel shift control.
00000 is the minimum shift factor and 11111 is maximum shift factor. This compensates for the CIC filter gain of R N , where N is the
number of enabled CIC stages and R is the CIC decimation factor. The equation used to compute the shift factor is:
Shift Factor = 45 - Ceiling(log 2 (R N )).
Examples:
N R
Shift Factor
5
5
512
8
0
30
13:9
8:6
5
4
3
CIC stage bypasses. The integrator/comb pairs are numbered 1 through 5 with 1 being the first integrator and first comb. Bit 13
bypasses the first integrator/comb pair, bit 12 bypasses the second, etc. The first integrator is the largest. Typically, the stages are
enabled starting with stage 1 for maximum decimation range.
Carrier phase shift. Phase shifts of N*( π /4), N = 0 to 7.
Clear feedback (test signal or for mixer bypass).
NCO clear feedback on load.
Update frequency on SYNCI. Redundant. Set to1. See Table 37, “RESET/SYNC/INTERRUPT SOURCE SELECTION REGISTER
(GWA = F802h),” on page 43.
33
FN4557.6
August 17, 2007
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