- 您现在的位置：买卖IC网 > Datasheet目录441 > HSP50216KIZ (Intersil)IC DOWNCONVERTER DGTL 4CH 196BGA Datasheet资料下载
参数资料
| 型号： | HSP50216KIZ |
| 厂商： | Intersil |
| 文件页数： | 38/58页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER DGTL 4CH 196BGA |
| 标准包装： | 1 |
| 功能： | 降频器 |
| RF 型： | W-CDMA |
| 封装/外壳： | 196-LFBGA |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页当前第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页
HSP50216
TABLE 23. SERIAL DATA OUTPUT CONTROL REGISTER (IWA = *014h) (Continued)
P(31:0)
21:20
FUNCTION
Magnitude output scale factor. The magnitude output of the cartesian to polar coordinate conversion has bits weighted as:
2 (2 1 0.-1 -2 -3 -4 . . . )
The gain in the conversion is 0.82338. When using 16 bits, the range is such that the LSB has a weight of 0.00007 and the maximum
output is 2.32, both after the conversion gain. This corresponds to an I/Q vector length of -83dBFS to +3dBFS. These control bits
add gain (with saturation) for more resolution at the bottom of the scale. A code of 00 passes the magnitude unchanged, 01 shifts
the magnitude up one bit position’ 10 shifts by 2 positions and 11 shifts up three positions. The resulting bit weights and range (after
conversion gain) for the unsigned numbers are:
Code
00
01
10
11
Bit Weights
2 1 0 -1 -2 . . . -11 -12 -13
1 0 -1 -2 -3 . . . -12 -13 -14
0 -1 -2 -3 -4 . . . -13 -14 -15
-1 -2 -3 -4 -5 . . . -14 -15 -16
dBFS
+3 to -83
+3 to -89
+1.7 to -95
-4.3 to -101
The upper limits on codes 00 and 01 are the same, but 01 has no leading zero.
19:16
Serial data output SD1 routing mask. 0 disables. 1 enables.
Bit
16
17
18
19
Enabled Output
Enables the serial output for this channel to pin SD1A.
Enables the serial output for this channel to pin SD1B.
Enables the serial output for this channel to pin SD1C.
Enables the serial output for this channel to pin SD1D.
15:12
Serial data output SD2 routing mask. 0 disables. 1 enables.
Bit
12
13
14
15
Enabled Output.
Enables the serial output for this channel to pin SD2A.
Enables the serial output for this channel to pin SD2B.
Enables the serial output for this channel to pin SD2C.
Enables the serial output for this channel to pin SD2D.
11:0
Output hold-off delay. This parameter adds additional delay from the output of the filter compute engine to start of the serial output
stream for multiplexing channels. Load with the desired delay (0 = zero, 1 = one, 2 = two, etc.).
38
FN4557.6
August 17, 2007
相关PDF资料 |
PDF描述 |
|---|---|
| HSP50415VIZ | IC MODULATOR PROGRAMABLE 100MQFP |
| HSSLS-CALBL-013 | HEATSINK 48W SPOT OSRAM PREVALED |
| HSSLS-CALCL-005 | HEATSINK 21W SPOT PHILIPS SLM |
| HSSLS-CALCL-013 | HEATSINK 48W DOWNLIGHT 140 |
| HTA-300-S | SENSOR CURR 300A -/+15V MOD |
相关代理商/技术参数 |
参数描述 |
|---|---|
| HSP50306 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital QPSK Demodulator |
| HSP50306 WAF | 制造商:Intersil Corporation 功能描述: |
| HSP50306_04 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital QPSK Demodulator |
| HSP50306SC-25 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| HSP50306SC-2596 | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Digital QPSK Demodulator |
发布紧急采购，3分钟左右您将得到回复。