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| 型号： | HSP50216KIZ |
| 厂商： | Intersil |
| 文件页数： | 46/58页 |
| 文件大小： | 0K |
| 描述： | IC DOWNCONVERTER DGTL 4CH 196BGA |
| 标准包装： | 1 |
| 功能： | 降频器 |
| RF 型： | W-CDMA |
| 封装/外壳： | 196-LFBGA |
| 包装： | 托盘 |
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HSP50216
TABLE 45. μ P FIFO READ ORDER CONTROL REGISTER (GWA = F820h THROUGH F83Fh)
P(15:0)
4:0
FUNCTION
The five bits selecting the data type are encoded as follows:
C C D D D,
where CC is the channel number and DDD is the data type.
DDD
Data Type
000
001
010
011
100
101
110
111
I(23:8)
I(7:0),8*zeros
Q(23:8)
Q(7:0),8*zero
Mag(23:8)
Mag(7:0),8*zero
Phase(15:0)
AGC gain (15:0)
The upper 16 bits of the I data path via the FIFO/AGC.
The lower 8 bits of the I data path.
The upper 16 bits of the Q data path via the FIFO/AGC.
The lower 8 bits of the Q data path.
The upper 16 bits of magnitude (after the gain adjust described in channel register)
The lower 8 bits of magnitude.
The upper 16 bits of phase.
The upper 16 bits of the AGC gain.
Table of Indirect Read Address (IRA) Registers
The address decoding for the read source locations is given below. The internal address of the data to be read is written to direct
address 3 (ADD(2:0) = 3) to select and/or fetch the data. A strobe is generated, if needed, to fetch or stabilize the data for reading.
If a strobe is needed, the indirect read address must be written to direct address 3 each time the data is needed. If a strobe is not
needed, the data can be read repeatedly at direct addresses 0 and 1(ADD(2:0) = 0 and 1, respectively) with any changes in the
data showing up immediately. The strobe to sample the AGC gain is generated separately by an indirect write (see IWA *00Fh in
the Tables of Indirect Write Address (IWA) Registers). This allows the AGC gain of all the channels to be sampled
simultaneously.
NOTE: These Indirect Read Addresses are repeated for each channel. In the addresses below, the * field is the channel select nibble. These bits
of the Indirect Address select the target channel register for the data being read. Values of 0 through 3 and F are valid.
TABLE 46. TABLE OF INDIRECT READ ADDRESS (IRA) REGISTERS
IRA
*006h
*00Ch
*009h
*00Fh
*100h - *17Fh
*180h - *1FCh
*400h - *43Fh
*440h - *47Fh
*480h - *4FFh
*500h - *5FFh
F806h
FUNCTION
Active Carrier NCO Center Frequency.
Wait Preload, Decr 1&2.
Active Timing NCO Center Freq (Most Significant 32 bits).
AGC gain (must first write to AGC gain read strobe register IWA = *00Fh before reading).
Instruction RAMs.
Instruction RAMs (pointer DRAM).
Coefficient ROM -HBF, const.
Coefficient RAM -1.
Coefficient RAM -2.
Coefficient ROM -Resampler.
Input Level Detector Output.
46
FN4557.6
August 17, 2007
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